Digital Signal Processor 144-QFP
PDF, 150 Kb, File published: Jul 1, 1997
This application report describes a real-time MIDI music synthesis system using a low cost digital signal processor (DSP) such as the Texas Instruments (TI)(tm) TMS320C32 in a PC environment. The system consists of a MIDI device with a MIDI interface, an IBM compatible personal computer, and a TMS320C32 development board where the core of the music synthesis engine resides. The MIDI device gen
PDF, 326 Kb, File published: Oct 1, 1996
TI supports four methods of booting a 32-bit floating point DSP following system reset. Each method uses a different combination of the TMS320C32 silicon features, software, and hardware tools. Each combination forms an integrated development environment that includes features to support most system boot requirements. This document describes in detail the four methods of system boot and provid
PDF, 160 Kb, File published: Nov 1, 1995
This document describes using the TMS320 floating-point digital signal processor (DSP) optimizing C compiler and assembly language tools with the variable memory width and data sizes supported by the TMS320C32 ('C32) 32-bit DSP. An overview of the 'C32 strobe control registers is presented along with their configuration for use with a compiler linker or debugger. Different memory configurations
PDF, 76 Kb, Revision: A, File published: Mar 1, 1996
The SN74ACT3638 FIFO contains a patented synchronous retransmit feature which allows data stored within the FIFO to be re-read starting at a selected position. This document shows the use of the retransmit feature with a digital signal processor (DSP) for finite impulse response (FIR) filtering. The application uses the 32-bit floating-point TMS320C31 and a SN74ACT3638 bi-directional clocked FIFO
PDF, 376 Kb, Revision: A, File published: May 1, 1996
The low-cost of the TMS320C32 (?C32) makes 32-bit floating-point digital signal processing (DSP) available to a wider variety of applications than ever before. This document explains in detail the features of the ?C32 enhanced memory interface with design examples for 32- 16- and 8-bit-wide external memories. Comprehensive diagrams show precise operation of the processor and complete circuits fo
PDF, 108 Kb, Revision: A, File published: Mar 1, 1996
FIFO memories are used in digital signal processing systems for matching data paths with asynchronous clock or data rates. This document shows the SN74ACT3632 512?36?2 clocked FIFO as a single-chip bi-directional buffering solution that interfaces to the TI TMS320C3x and TMS320C4x floating-point DSP family. Programmable FIFO flags enable DMA control techniques that are used to handle the data flow
PDF, 248 Kb, Revision: D, File published: Aug 6, 2004
System board-level design and end-equipment environments can impact the operation of specific commercial and military 320C3x (320C30 320C31 320LC31 320C32 and 320VC33) 320C4x (320C40 and 320C44) digital signal processors (DSPs) and the military 320MCM42x (320MCM42C and 320MCM42D) multichip modules (MCMs) during power up. The 320MCM42x MCM incorporates two 320C40 DSP die.Specifically the s
PDF, 254 Kb, File published: Jan 1, 1995
An efficient method of detecting combustion engine knock is using spectral analysis. The detection process algorithm adapts to a no-knock reference at varying speeds and loads by using multiple frequencies. This document presents an problem overview current technology and two implementation examples are given to aid in the development of system specific hardware and software. The first system is
PDF, 168 Kb, File published: Nov 1, 1994
Four steps are required to set the TMS320 DSP interrupts: create a interrupt service routine initialize the vector table and set the memory map enable the interrupts in the CPU and enable the interrupt sources. This document shows how to set the interrupts in C C callable assembly or in-line C. Sample C code segments are provided. The appendix gives complete examples for setting interrupt vec
