Datasheet Texas Instruments UCC38500DW
| Manufacturer | Texas Instruments |
| Series | UCC38500 |
| Part Number | UCC38500DW |
BiCMOS PFC/PWM Combination Controller 20-SOIC 0 to 70
Datasheets
BiCMOS PFC/PWM Combination Controller datasheet
PDF, 1.1 Mb, Revision: C, File published: Nov 8, 2001
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| Pin | 20 |
| Package Type | DW |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 25 |
| Carrier | TUBE |
| Device Marking | UCC38500DW |
| Width (mm) | 7.5 |
| Length (mm) | 12.8 |
| Thickness (mm) | 2.35 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2.65 |
| Mechanical Data | Download |
Parametrics
| Control Method | CCM |
| Device Type | PFC+PWM |
| Operating Supply Current | 4 mA |
| Operating Supply(Max) | 18 V |
| Operating Temperature Range | 0 to 70 C |
| Package Group | SOIC |
| Package Size: mm2:W x L | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) PKG |
| Peak Output Sink Current Gate Drive | 1.2 A |
| Peak Output Source Current Gate Drive | -1.2 A |
| Practical Operating Frequency(Max) | 0.2 MHz |
| Rating | Catalog |
| Special Features | < 150W Applications,Average Current Mode,Enable,OVP |
| Startup Current | 0.15 mA |
| UVLO Thresholds On/Off | 16/10 V |
Eco Plan
| RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: UCC38500EVM
UCC38500EVM Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- Bootstrap Circuit for Green Mode ApplicationsPDF, 111 Kb, File published: Jan 27, 2006
- A New Synchronization Circuit for Power Converters (Rev. A)PDF, 209 Kb, Revision: A, File published: Apr 21, 2010
The synchronization of multiple PWM and PFC controllers is desirable for many reasons. The most common reason is that it keeps all the noise at one particular frequency and makes it easier to filter. The circuit described changes the slope of the ramp to lock the converter’s switching frequency to an applied signal by a phase locked loop turning it into a voltage controlled oscillator. Furthermore - Startup Current transient of the Leading Edge Triggered PFC ControllersPDF, 43 Kb, File published: Jun 30, 2004
- Avoiding Audible Noise at Light Loads When Using Leading Edge Triggered PFC Con (Rev. C)PDF, 57 Kb, Revision: C, File published: Apr 13, 2011
This application note applies to the TI average current mode, leading edge modulation PFC controllers. See Applicable Device Table for part numbers. - DN-66 UC3854A/B and UC3855A/B Provide Power Limiting with Sinusoidal Input (Rev. A)PDF, 80 Kb, Revision: A, File published: Nov 6, 2001
- Accurate PWM Duty Cycle ClampPDF, 58 Kb, File published: Jan 25, 2002
Power supply applications using current sense transformers require a duty cycle clamp on the pulse width modulator (PWM) to ensure transformer reset. Not all PWMs come with a duty cycle clamp presenting a problem for the power supply designer. This application note shows how to implement a duty cycle clamp by using a simple delay circuit.
Model Line
Series: UCC38500 (3)
- UCC38500DW UCC38500DWG4 UCC38500N
Manufacturer's Classification
- Semiconductors > Power Management > Offline and Isolated DC/DC Controllers and Converters > Power Factor Correction
