Datasheet Texas Instruments THS10064CDAR

10-Bit, 6 MSPS ADC Quad Ch.

Datasheets

PDF, 504 Kb, Revision: B, File published: Dec 10, 2002

Extract from the document

(Config.), DSP/uP Interface, Integ. 16x FIFO, Ch. AutoScan, Low Power 32-TSSOP 0 to 70

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

# Input Channels	4
Analog Voltage AVDD(Max)	5.25 V
Analog Voltage AVDD(Min)	4.75 V
Architecture	Pipeline
Digital Supply(Max)	5.25 V
Digital Supply(Min)	3 V
INL(Max)	1 +/-LSB
Input Range(Max)	4 V
Input Range(Min)	1.4 V
Input Type	Differential,Single-Ended
Integrated Features	N/A
Interface	Parallel
Multi-Channel Configuration	Multiplexed
Operating Temperature Range	-40 to 85,0 to 70 C
Package Group	TSSOP
Package Size: mm2:W x L	32TSSOP: 89 mm2: 8.1 x 11(TSSOP) PKG
Power Consumption(Typ)	186 mW
Rating	Catalog
Reference Mode	Ext,Int
Resolution	10 Bits
SINAD	59 dB
SNR	61 dB
Sample Rate (max)	6MSPS SPS
Sample Rate(Max)	6 MSPS
THD(Typ)	-64 dB

RoHS

Compliant

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Series: THS10064 (5)

Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)