Fixed-Point Digital Signal Processor 240-BGA MICROSTAR
PDF, 211 Kb, File published: Dec 1, 2000
This paper describes how the Open Multimedia Applications Platform(tm) software and hardware architecture enables multimedia applications in third-generation (3G) wireless appliances. It provides an overview of OMAP(tm) strategy, concepts, main milestones, and achievements. It also describes OMAP hardware architecture, explains how multimedia applications can benefit from this advanced architectur
PDF, 458 Kb, Revision: A, File published: May 19, 2006
The enhanced host port interface (EHPI) on the TMS320VC5509 and TMS320VC5510 DSPs provides a 16-bit port through which a host device may access the internal and external memory space of the DSP. The flexibility of the EHPI interface allows various host devices to interface with the DSP using minimal or no external interface logic. This document describes various possible EHPI configurations and ex
PDF, 402 Kb, Revision: A, File published: Sep 30, 2004
Power consumption is a key concern for embedded system developers. By developing low-power solutions, developers can deliver products that have longer battery life. One technique that can be used to save power is frequency and voltage scaling of the processor.Since the power consumption of a DSP is proportional to the system clock switching speed, running the device at the lowest possible fre
PDF, 140 Kb, Revision: A, File published: Jun 16, 2003
The TMS320C55xв„ў(C55xв„ў) External Memory Interface (EMIF) supports a glueless interface to high-density and high-speed synchronous burst static random access memories (SBSRAM). For clocking SBSRAMs, the EMIF can operate at numerous C55x DSP CPU clock output frequency multiples. Examples are given for system-level connection and register configuration for the different types of SBSRAM mem
PDF, 269 Kb, Revision: C, File published: Oct 19, 2004
This document describes the features of the on-chip bootloader provided with the TMS320VC5510 Digital Signal Processor (DSP). Included are descriptions of each of the available boot modes and any interfacing requirements associated with them, instructions on generating the boot table, and information on migration from the prototype (TMX320VC5510, revision 1.x) to the production (TMS320VC5510) boot
PDF, 100 Kb, Revision: A, File published: Apr 20, 2005
The DSP Hardware Designer's Resource Guide is organized by development flow and functional areas to make your design effort as seamless as possible. Topics covered include getting started, board design, system testing, and checklists to aid in your initial design and debug efforts. Each section includes pointers to valuable information including technical documentation, models, symbols, and refer
PDF, 83 Kb, File published: May 27, 2004
This application report summarizes some characteristics relevant to understanding TMS320VC5510 host port interface (HPI), and proposes recommendations to optimize throughput on the HPI peripheral.
PDF, 78 Kb, File published: Nov 12, 2003
This document assists in the estimation of power consumption for the TMS320C5510 digital signal processor (DSP). As power consumption can vary widely on this device, a spreadsheet was developed to provide a better estimate. This allows the user to tailor the prediction to their particular application. It also allows designers the ability to test the efficiency of different configurations before an
PDF, 187 Kb, File published: Feb 28, 2003
This document describes issues of interest related to migration from the TMS320VC5510 to the TMS320VC5502. The objective of this document is to indicate differences between the two devices. Functions that are identical between the two devices are not included. For detailed information on the specific functions of either device, refer to the following data manuals and reference guides: the TMS320VC
