Datasheet Texas Instruments ADC12D1600CCMPR
| Manufacturer | Texas Instruments |
| Series | ADC12D1600QML-SP |
| Part Number | ADC12D1600CCMPR |
Datasheets
ADC12D1600QML 12-Bit, 3.2/2.0 GSPS RF Sampling ADC datasheet
PDF, 904 Kb, File published: Dec 17, 2012
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 376 | 376 |
| Package Type | NAA | NAA |
| Industry STD Term | CCGA | CCGA |
| JEDEC Code | S-CBGA-N | S-CBGA-N |
| Package QTY | 1 | 1 |
| Carrier | EIAJ TRAY (10+1) | EIAJ TRAY (10+1) |
| Device Marking | MPR E.S. | ADC12D1600CC |
| Width (mm) | 27.94 | 27.94 |
| Length (mm) | 27.94 | 27.94 |
| Thickness (mm) | 2.79 | 2.79 |
| Pitch (mm) | 1.27 | 1.27 |
| Max Height (mm) | 3.5 | 3.5 |
| Mechanical Data | Download | Download |
Parametrics
| # Input Channels | 2,1 |
| Analog Input BW | 2400 MHz |
| Architecture | Folding Interpolating |
| DNL(Max) | 0.5 +/-LSB |
| DNL(Typ) | 0.5 +/-LSB |
| ENOB | 8.9 Bits |
| INL(Max) | 2.5 +/-LSB |
| INL(Typ) | 2.5 +/-LSB |
| Input Buffer | Yes |
| Input Range | 0.8 Vp-p |
| Interface | Parallel LVDS |
| Operating Temperature Range | -55 to 125,25 to 25 C |
| Package Group | CCGA |
| Package Size: mm2:W x L | 376CCGA: 781 mm2: 27.94 x 27.94(CCGA) PKG |
| Power Consumption(Typ) | 3880 mW |
| Rating | Space |
| Reference Mode | Int |
| Resolution | 12 Bits |
| SFDR | 61.5 dB |
| SINAD | 55.4 dB |
| SNR | 56.6 dB |
| Sample Rate(Max) | 1600,3200 MSPS |
Eco Plan
| RoHS | See ti.com |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: ADC12D1600CVAL
ADC12D1600QML-SP 12-Bit, Dual 1.6- or Single 3.2-GSPS, RF-Sampling ADC Evaluation Module - Aerospace
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- Signal Chain Noise Figure AnalysisPDF, 615 Kb, File published: Oct 29, 2014
- Wide Bandwidth Receiver Implementation by Interleaving Two Giga-Sampling ADCsPDF, 621 Kb, File published: Dec 7, 2015
- Synchronizing the Giga-Sample ADCs Interfaced with Multiple FPGAsPDF, 943 Kb, File published: Aug 6, 2014
- AN-2128 ADC1xD1x00 Pin Compatibility (Rev. C)PDF, 60 Kb, Revision: C, File published: May 1, 2013
In order to facilitate upgrading applications from a 10-bit Gig ADC to a 12-bit Gig ADC, the ADC10D1x00(ADC10D1500/ADC10D1000) is designed to be pin-compatible with the ADC12D1x00(ADC12D1800/1600/1000). This means that a single board layout may be designed with both resolutionADCs in mind for more cost efficient and time-to-market product development. - From Sample Instant to Data Output: Understanding Latency in the GSPS ADCPDF, 392 Kb, File published: Dec 18, 2012
For many applications which use ultra high-speed ADCs, latency can be a critical performance specification. For example, if the ADC is used in any kind of feedback loop, then the absolute latency is an important factor. For a MIMO system such as a phased array radar, the relative difference and variability in latency becomes important. This application note covers latency in the GSPS ADC products, - AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G)PDF, 169 Kb, Revision: G, File published: Feb 3, 2017
Model Line
Series: ADC12D1600QML-SP (2)
- ADC12D1600CCMLS ADC12D1600CCMPR
Manufacturer's Classification
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)
