Datasheet Texas Instruments 66AK2E05XABD25

Manufacturer	Texas Instruments
Series	66AK2E05
Part Number	66AK2E05XABD25

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Eco Plan

Design Kits & Evaluation Modules

• JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
  XDS560v2 System Trace USB & Ethernet Debug Probe
  Lifecycle Status: Active (Recommended for new designs)
  
• JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
  XDS560v2 System Trace USB Debug Probe
  Lifecycle Status: Active (Recommended for new designs)
  
• Evaluation Modules & Boards: XEVMK2EX
  K2E Development Board
  Lifecycle Status: Active (Recommended for new designs)
  
• Evaluation Modules & Boards: EVMK2EX
  K2E Development Board
  Lifecycle Status: Preview (Device has been announced but is not in production. Samples may or may not be available)
  
• JTAG Emulators/ Analyzers: TMDSEMU200-U
  XDS200 USB Debug Probe
  Lifecycle Status: Active (Recommended for new designs)
  

Application Notes

• Download
  Power Consumption Summary for K2E System-on-Chip (SoC) Device Family
  PDF, 65 Kb, File published: Jun 14, 2017
  This application report discusses estimating the power consumption of Texas Instruments' K2Ex Digital Signal Processors (DSP) using a provided device-specific power spreadsheet. It should be noted that the power model is applicable for all silicon revisions.
• Download
  Clocking Spreadsheet for K2E Device Family
  PDF, 22 Kb, File published: Jan 26, 2017
  This document discusses the internal clocking architecture of Texas Instruments K2Ex Digital Signal Processors (DSP) using a provided clocking spreadsheet.The 66AK2Ex and AM5K2Ex devices have similar internal clocking architecture and peripherals except the corepac. The 66AK2Ex devices have both DSP corepac and ARM corepac, whereas, the AM5K2Ex devices have ARM corepac only.Use the K
• Download
  PCI Express (PCIe) Resource Wiki for Keystone Devices (Rev. A)
  PDF, 57 Kb, Revision: A, File published: May 19, 2017
• Download
  Keystone II DDR3 Initialization
  PDF, 73 Kb, File published: Jan 26, 2015
  This application report provides a step-to-step initialization guide for the Keystone II device DDR3 SDRAM controller.
• Download
  Throughput Performance Guide for KeyStone II Devices (Rev. B)
  PDF, 866 Kb, Revision: B, File published: Dec 22, 2015
  This application report analyzes various performance measurements of the KeyStone II family of processors. It provides a throughput analysis of the various support peripherals to different end-points and memory access.
• Download
  Keystone II DDR3 Debug Guide
  PDF, 143 Kb, File published: Oct 16, 2015
  This guide provides tools for use when debugging a failing DDR3 interface on a KeyStone II device.
• Download
  Power Management of KS2 Device (Rev. C)
  PDF, 61 Kb, Revision: C, File published: Jul 15, 2016
  This application report lists the steps to enable Class 0 Temperature Compensation (Class 0 TC) mode of SmartReflexв„ў Subsystem (SRSS) module available on such devices.
• Download
  Hardware Design Guide for KeyStone II Devices
  PDF, 1.8 Mb, File published: Mar 24, 2014
• Download
  SERDES Link Commissioning on KeyStone I and II Devices
  PDF, 138 Kb, File published: Apr 13, 2016
  The serializer-deserializer (SerDes) performs serial-to-parallel conversions on data received from a peripheral device and parallel-to-serial conversion on data received from the CPU. This application report explains the SerDes transmit and receive parameters tuning, tools and some debug techniques for TI Keystone I and Keystone II devices.
• Download
  PCIe Use Cases for KeyStone Devices
  PDF, 320 Kb, File published: Dec 13, 2011
• Download
  Clocking Design Guide for KeyStone Devices
  PDF, 1.5 Mb, File published: Nov 9, 2010
• Download
  The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)
  PDF, 20 Kb, Revision: A, File published: Nov 10, 2010
  The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM
• Download
  Optimizing Loops on the C66x DSP
  PDF, 585 Kb, File published: Nov 9, 2010
• Download
  DDR3 Design Requirements for KeyStone Devices (Rev. B)
  PDF, 582 Kb, Revision: B, File published: Jun 5, 2014
• Download
  Multicore Programming Guide (Rev. B)
  PDF, 1.8 Mb, Revision: B, File published: Aug 29, 2012
  As application complexity continues to grow, we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing demand, modern System-On-Chip solutions contain multiple processing cores. The dilemma is how to map applications to multicore devices. In this paper, we present a programming methodology for converting applications to run on multicore
• Download
  Processor SDK RTOS Audio Benchmark Starter Kit
  PDF, 530 Kb, File published: Apr 12, 2017
  The TI TMS320C6000в„ў Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications that are commonly used in audio processing application. This application notes describes Audio Benchmark Starterkit software that is intended to provide an easy and quick way to benchmark key audio functions on C66x and C674x DSP device
• Download
  TI DSP Benchmarking
  PDF, 62 Kb, File published: Jan 13, 2016
  This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms.

Model Line

Manufacturer's Classification

• Semiconductors > Processors > Digital Signal Processors > C6000 DSP + ARM Processors > 66AK2x