Datasheet Texas Instruments ADS7961SDBTG4
Manufacturer | Texas Instruments |
Series | ADS7961 |
Part Number | ADS7961SDBTG4 |
8 Bit, 1 MSPS, 16 Ch, Single Ended, Micro Power, sr i/f, SAR ADC 38-TSSOP -40 to 125
Datasheets
ADS79xx 12/10/8-Bit, 1 MSPS, 16/12/8/4-Channel, Single-Ended, MicroPower, Serial Interface ADCs datasheet
PDF, 1.9 Mb, Revision: B, File published: Jul 31, 2015
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Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes |
Packaging
Pin | 38 |
Package Type | DBT |
Industry STD Term | TSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 50 |
Carrier | TUBE |
Device Marking | ADS7961 |
Width (mm) | 4.4 |
Length (mm) | 9.7 |
Thickness (mm) | 1 |
Pitch (mm) | .5 |
Max Height (mm) | 1.2 |
Mechanical Data | Download |
Parametrics
# Input Channels | 16 |
Analog Voltage AVDD(Max) | 5.25 V |
Analog Voltage AVDD(Min) | 2.7 V |
Architecture | SAR |
Digital Supply(Max) | 5.25 V |
Digital Supply(Min) | 1.7 V |
INL(Max) | 0.3 +/-LSB |
Input Range(Max) | 5.25 V |
Input Type | Single-Ended |
Integrated Features | N/A |
Interface | SPI |
Multi-Channel Configuration | Multiplexed |
Operating Temperature Range | -40 to 125 C |
Package Group | TSSOP |
Package Size: mm2:W x L | 38TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) PKG |
Power Consumption(Typ) | 11.5 mW |
Rating | Catalog |
Reference Mode | Ext |
Resolution | 8 Bits |
SINAD | 49 dB |
SNR | 49 dB |
Sample Rate (max) | 1MSPS SPS |
Sample Rate(Max) | 1 MSPS |
THD(Typ) | -75 dB |
Eco Plan
RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: ADS7961EVM-PDK
ADS7961 Performance Demonstration Kit (PDK)
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, File published: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, File published: Apr 16, 2015
Model Line
Series: ADS7961 (6)
- ADS7961SDBT ADS7961SDBTG4 ADS7961SDBTR ADS7961SDBTRG4 ADS7961SRHBR ADS7961SRHBT
Manufacturer's Classification
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)