Datasheet Texas Instruments SN74LS193NE4
| Manufacturer | Texas Instruments |
| Series | SN74LS193 |
| Part Number | SN74LS193NE4 |
Synchronous 4-Bit Up/Down Binary Counters With Dual Clock and Clear 16-PDIP 0 to 70
Datasheets
Synchronous 4-Bit Up/Down Counters (Dual Clock With Clear) datasheet
PDF, 1.1 Mb, File published: Mar 1, 1988
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Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 16 |
| Package Type | N |
| Industry STD Term | PDIP |
| JEDEC Code | R-PDIP-T |
| Package QTY | 25 |
| Carrier | TUBE |
| Device Marking | SN74LS193N |
| Width (mm) | 6.35 |
| Length (mm) | 19.3 |
| Thickness (mm) | 3.9 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 5.08 |
| Mechanical Data | Download |
Parametrics
| Bits | 4 |
| F @ Nom Voltage(Max) | 35 Mhz |
| Function | Counter |
| ICC @ Nom Voltage(Max) | 34 mA |
| Operating Temperature Range | 0 to 70 C |
| Output Drive (IOL/IOH)(Max) | 8/-0.4 mA |
| Package Group | PDIP |
| Package Size: mm2:W x L | See datasheet (PDIP) PKG |
| Rating | Catalog |
| Technology Family | LS |
| Type | Binary |
| VCC(Max) | 5.25 V |
| VCC(Min) | 4.75 V |
| Voltage(Nom) | 5 V |
| tpd @ Nom Voltage(Max) | 47 ns |
Eco Plan
| RoHS | Compliant |
| Pb Free | Yes |
Application Notes
- Designing with the SN54/74LS123 (Rev. A)PDF, 118 Kb, Revision: A, File published: Mar 1, 1997
The Texas Instruments (TI) SN54/74LS123 dual retriggerable monostable multivibrator is a one-shot device capable of verylong output pulses and up to 100% duty cycle. The ?LS123 also features dc triggering from gated low-level active A andhigh-level active B inputs and provides a clear input that terminates the output pulse of any predetermined time independentof timing components R ext and
Model Line
Series: SN74LS193 (7)
- SN74LS193D SN74LS193DR SN74LS193J SN74LS193N SN74LS193N3 SN74LS193NE4 SN74LS193NSR
Manufacturer's Classification
- Semiconductors > Logic > Specialty Logic > Counter/Arithmetic/Parity Function
