Datasheet Texas Instruments OPA699IDG4

ManufacturerTexas Instruments
SeriesOPA699
Part NumberOPA699IDG4
Datasheet Texas Instruments OPA699IDG4

OPA699: Wideband, High Gain Voltage Limiting Amplifier 8-SOIC -40 to 85

Datasheets

Wideband, High Gain Voltage Limiting Amplifier datasheet
PDF, 1.0 Mb, Revision: D, File published: Dec 30, 2008
Extract from the document

Prices

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

Packaging

Pin88
Package TypeDD
Industry STD TermSOICSOIC
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY7575
CarrierTUBETUBE
Device Marking699OPA
Width (mm)3.913.91
Length (mm)4.94.9
Thickness (mm)1.581.58
Pitch (mm)1.271.27
Max Height (mm)1.751.75
Mechanical DataDownloadDownload

Parametrics

2nd Harmonic67 dBc
3rd Harmonic87 dBc
@ MHz5
Acl, min spec gain4 V/V
Additional FeaturesN/A
ArchitectureVoltage FB
BW @ Acl260 MHz
CMRR(Min)55 dB
CMRR(Typ)61 dB
GBW(Typ)1000 MHz
Input Bias Current(Max)10000000 pA
Iq per channel(Max)15.9 mA
Iq per channel(Typ)15.5 mA
Number of Channels1
Offset Drift(Typ)15 uV/C
Operating Temperature Range-40 to 85 C
Output Current(Typ)120 mA
Package GroupSOIC
Package Size: mm2:W x L8SOIC: 29 mm2: 6 x 4.9(SOIC) PKG
Rail-to-RailNo
RatingCatalog
Slew Rate(Typ)1400 V/us
Total Supply Voltage(Max)12 +5V=5, +/-5V=10
Total Supply Voltage(Min)5 +5V=5, +/-5V=10
Vn at 1kHz(Typ)13 nV/rtHz
Vn at Flatband(Typ)4.1 nV/rtHz
Vos (Offset Voltage @ 25C)(Max)5 mV

Eco Plan

RoHSCompliant

Design Kits & Evaluation Modules

  • Evaluation Modules & Boards: DEM-OPA-SO-1A
    DEM-OPA-SO-1A Unpopulated PCB Compatible w/High Speed Wide Bandwidth Op Amps in 8-lead SOIC (D) Pkg
    Lifecycle Status: Active (Recommended for new designs)

Application Notes

  • RLC Filter Design for ADC Interface Applications (Rev. A)
    PDF, 299 Kb, Revision: A, File published: May 13, 2015
    As high performance Analog-to-Digital Converters (ADCs) continue to improve in their performance, the last stage interface from the final amplifier into the converter inputs becomes a critical element in the system design if the full converter dynamic range is desired. This application note describes the performance and design equations for a simple passive 2nd-order filter used successfully in AD
  • ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers
    PDF, 273 Kb, File published: Apr 22, 2004
    Once an analog-to-digital converter (ADC) and a driver/interface have been selected for a given application, the next step to achieving excellent performance is laying out the printed circuit board (PCB) that will support the application. This application report describes several techniques for optimizing a high-speed, 14-bit performance, differential driver PCB layout using a wideband operation
  • Measuring Board Parasitics in High-Speed Analog Design
    PDF, 134 Kb, File published: Jul 7, 2003
    Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq
  • Noise Analysis for High Speed Op Amps (Rev. A)
    PDF, 256 Kb, Revision: A, File published: Jan 17, 2005
    As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

Model Line

Series: OPA699 (3)

Manufacturer's Classification

  • Semiconductors > Amplifiers > Operational Amplifiers (Op Amps) > High-Speed Op Amps (>=50MHz)