Datasheet Texas Instruments CD74AC138EE4

3-Line to 8-Line Inverting Decoders/Demultiplexers 16-PDIP -55 to 125

Datasheets

PDF, 916 Kb, Revision: A, File published: Feb 21, 2003

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Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Bandwidth	100 MHz
Bits	8
Number of Channels	1
Configuration	3:8
Digital input leakage(Max)	5 uA
ESD Charged Device Model	0.75 kV
ESD HBM	2 kV
F @ Nom Voltage(Max)	100 Mhz
Function	Decoder/Demultiplexer
ICC @ Nom Voltage(Max)	0.08 mA
Operating Temperature Range	-55 to 125 C
Output Drive (IOL/IOH)(Max)	24/-24 mA
Package Group	PDIP
Package Size: mm2:W x L	See datasheet (PDIP) PKG
Rating	Catalog
Schmitt Trigger	No
Technology Family	AC
Type	Standard
VCC(Max)	5.5 V
VCC(Min)	1.5 V
Voltage(Nom)	1.5, 3.3,5 V
tpd @ Nom Voltage(Max)	138,15.4,11 ns

RoHS	Compliant
Pb Free	Yes

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Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
PDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Series: CD74AC138 (7)