Datasheet Texas Instruments SN74AUP2G32RSER

ManufacturerTexas Instruments
SeriesSN74AUP2G32
Part NumberSN74AUP2G32RSER
Datasheet Texas Instruments SN74AUP2G32RSER

Low-Power Dual 2-Input Positive-OR Gate 8-UQFN -40 to 85

Datasheets

SN74AUP2G32 Low-Power Dual 2-Input Positive-OR Gate datasheet
PDF, 1.2 Mb, Revision: B, File published: May 18, 2010
Extract from the document

Prices

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

Packaging

Pin8
Package TypeRSE
Industry STD TermUQFN
JEDEC CodeS-PQFP-N
Package QTY5000
CarrierLARGE T&R
Device MarkingPS
Width (mm)1.5
Length (mm)1.5
Thickness (mm).55
Pitch (mm).5
Max Height (mm).6
Mechanical DataDownload

Parametrics

3-State OutputNo
Bits2
F @ Nom Voltage(Max)100 Mhz
Gate TypeOR
ICC @ Nom Voltage(Max)0.0009 mA
LogicTrue
Operating Temperature Range-40 to 85 C
Output Drive (IOL/IOH)(Max)4/-4 mA
Package GroupUQFN
Package Size: mm2:W x L8UQFN: 2 mm2: 1.5 x 1.5(UQFN) PKG
RatingCatalog
Schmitt TriggerNo
Special FeaturesIOFF,low power consumption,low tpd
Sub-FamilyOR Gate
Technology FamilyAUP
VCC(Max)3.6 V
VCC(Min)0.8 V
Voltage(Nom)0.8,1.2,1.5,1.8,2.5,3.3 V
tpd @ Nom Voltage(Max)32.8,20.9,14.2,11,7.6,6.2 ns

Eco Plan

RoHSCompliant

Application Notes

  • Understanding Schmitt Triggers
    PDF, 80 Kb, File published: Sep 21, 2011

Model Line

Manufacturer's Classification

  • Semiconductors > Logic > Little Logic