Datasheet Texas Instruments SN74LV10ADRG4
| Manufacturer | Texas Instruments |
| Series | SN74LV10A |
| Part Number | SN74LV10ADRG4 |
Triple 3-Input Positive-NAND Gate 14-SOIC -40 to 85
Datasheets
SN54LV10A, SN74LV10A datasheet
PDF, 853 Kb, Revision: E, File published: Apr 22, 2005
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 14 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | LV10A |
| Width (mm) | 3.91 |
| Length (mm) | 8.65 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Download |
Parametrics
| Bits | 3 |
| F @ Nom Voltage(Max) | 70 Mhz |
| ICC @ Nom Voltage(Max) | 0.02 mA |
| Operating Temperature Range | -40 to 85 C |
| Output Drive (IOL/IOH)(Max) | 50/-50 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 14SOIC: 52 mm2: 6 x 8.65(SOIC) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | LV-A |
| VCC(Max) | 5.5 V |
| VCC(Min) | 2 V |
| Voltage(Nom) | 2.5,3.3,5 V |
| tpd @ Nom Voltage(Max) | 20.5,13.5,9 ns |
Eco Plan
| RoHS | Compliant |
Model Line
Series: SN74LV10A (7)
- SN74LV10AD SN74LV10ADR SN74LV10ADRG4 SN74LV10ANSR SN74LV10APW SN74LV10APWR SN74LV10APWRG4
Manufacturer's Classification
- Semiconductors > Logic > Gate > NAND Gate
