Datasheet Texas Instruments 74ACT11074DBLE

ManufacturerTexas Instruments
Series74ACT11074
Part Number74ACT11074DBLE
Datasheet Texas Instruments 74ACT11074DBLE

Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 14-SSOP -40 to 85

Datasheets

Dual D-Type Positive-Edge-Triggered Flip Flop With Clear And Preset datasheet
PDF, 877 Kb, Revision: A, File published: Apr 1, 1996
Extract from the document

Prices

Status

Lifecycle StatusObsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample AvailabilityNo

Packaging

Pin14
Package TypeDB
Industry STD TermSSOP
JEDEC CodeR-PDSO-G
Width (mm)5.3
Length (mm)6.2
Thickness (mm)1.95
Pitch (mm).65
Max Height (mm)2
Mechanical DataDownload

Parametrics

3-State OutputNo
Approx. Price (US$)0.94 | 1ku
Bits(#)2
F @ Nom Voltage(Max)(Mhz)90
ICC @ Nom Voltage(Max)(mA)0.04
Input TypeTTL
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max)(mA)24/-24
Output TypeCMOS
Package GroupSSOP
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
RatingCatalog
Schmitt TriggerNo
Technology FamilyACT
VCC(Max)(V)5.5
VCC(Min)(V)4.5
Voltage(Nom)(V)5
tpd @ Nom Voltage(Max)(ns)9.4

Eco Plan

RoHSNot Compliant
Pb FreeNo

Application Notes

  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, Revision: A, File published: Jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
  • Introduction to Logic
    PDF, 93 Kb, File published: Apr 30, 2015
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, File published: Aug 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Kb, Revision: D, File published: Jun 23, 2016
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Model Line

Manufacturer's Classification

  • Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Flip-Flop