Datasheet Texas Instruments OPA4820IDR
| Manufacturer | Texas Instruments |
| Series | OPA4820 |
| Part Number | OPA4820IDR |
Quad, Unity-Gain, Low-Noise, Voltage-Feedback Operational Amplifier 14-SOIC -40 to 85
Datasheets
Quad, Unity-Gain, Low-Noise, Voltage-Feedback Operational Amplifier datasheet
PDF, 840 Kb, Revision: D, File published: Aug 28, 2008
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Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 14 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | OPA4820 |
| Width (mm) | 3.91 |
| Length (mm) | 8.65 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Download |
Parametrics
| 2nd Harmonic | 84 dBc |
| 3rd Harmonic | 92 dBc |
| @ MHz | 1 |
| Acl, min spec gain | 1 V/V |
| Additional Features | N/A |
| Architecture | Bipolar,Voltage FB |
| BW @ Acl | 650 MHz |
| CMRR(Min) | 76 dB |
| CMRR(Typ) | 85 dB |
| GBW(Typ) | 650 MHz |
| Input Bias Current(Max) | 20000000 pA |
| Iq per channel(Max) | 5.85 mA |
| Iq per channel(Typ) | 5.6 mA |
| Number of Channels | 4 |
| Offset Drift(Typ) | 4 uV/C |
| Operating Temperature Range | -40 to 85 C |
| Output Current(Typ) | 85 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 14SOIC: 52 mm2: 6 x 8.65(SOIC) PKG |
| Rail-to-Rail | No |
| Rating | Catalog |
| Slew Rate(Typ) | 240 V/us |
| Total Supply Voltage(Max) | 12 +5V=5, +/-5V=10 |
| Total Supply Voltage(Min) | 5 +5V=5, +/-5V=10 |
| Vn at 1kHz(Typ) | 2.5 nV/rtHz |
| Vn at Flatband(Typ) | 2.5 nV/rtHz |
| Vos (Offset Voltage @ 25C)(Max) | 0.8 mV |
Eco Plan
| RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: DEM-OPA-SO-4A
DEM-OPA-SO-4A
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: DEM-OPA-TSSOP-4A
DEM-OPA-TSSOP-4A
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- RLC Filter Design for ADC Interface Applications (Rev. A)PDF, 299 Kb, Revision: A, File published: May 13, 2015
As high performance Analog-to-Digital Converters (ADCs) continue to improve in their performance, the last stage interface from the final amplifier into the converter inputs becomes a critical element in the system design if the full converter dynamic range is desired. This application note describes the performance and design equations for a simple passive 2nd-order filter used successfully in AD - ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC DriversPDF, 273 Kb, File published: Apr 22, 2004
Once an analog-to-digital converter (ADC) and a driver/interface have been selected for a given application, the next step to achieving excellent performance is laying out the printed circuit board (PCB) that will support the application. This application report describes several techniques for optimizing a high-speed, 14-bit performance, differential driver PCB layout using a wideband operation - Measuring Board Parasitics in High-Speed Analog DesignPDF, 134 Kb, File published: Jul 7, 2003
Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq
Model Line
Series: OPA4820 (6)
- OPA4820ID OPA4820IDG4 OPA4820IDR OPA4820IPWR OPA4820IPWT OPA4820IPWTG4
Manufacturer's Classification
- Semiconductors > Amplifiers > Operational Amplifiers (Op Amps) > High-Speed Op Amps (>=50MHz)
