Datasheet Texas Instruments ADS8372IBRHPR
| Manufacturer | Texas Instruments |
| Series | ADS8372 |
| Part Number | ADS8372IBRHPR |
16-Bit 600KSPS Serial ADC with Ref and Pseudo Bipolar, Fully Differential Input 28-VQFN -40 to 85
Datasheets
16-Bit 600-kHz Fully Diff Pseudo-Bipolar Input Micropower Sampling ADC datasheet
PDF, 1.3 Mb, File published: Jun 24, 2005
Extract from the document
Prices
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 28 | 28 |
| Package Type | RHP | RHP |
| Industry STD Term | VQFN | VQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N |
| Device Marking | ADS8372I | B |
| Width (mm) | 6 | 6 |
| Length (mm) | 6 | 6 |
| Thickness (mm) | .9 | .9 |
| Pitch (mm) | .65 | .65 |
| Max Height (mm) | 1 | 1 |
| Mechanical Data | Download | Download |
Parametrics
| # Input Channels | 1 |
| Analog Voltage AVDD(Max)(V) | 5.25 |
| Analog Voltage AVDD(Min)(V) | 4.75 |
| Approx. Price (US$) | 10.50 | 1ku |
| Architecture | SAR |
| Digital Supply(Max)(V) | 5.25 |
| Digital Supply(Min)(V) | 2.7 |
| INL(Max)(+/-LSB) | 0.75 |
| Input Range(Max)(V) | 4.096 |
| Input Type | Differential |
| Integrated Features | Oscillator |
| Interface | Serial I2C |
| Multi-Channel Configuration | N/A |
| Operating Temperature Range(C) | -40 to 85 |
| Package Group | VQFN |
| Package Size: mm2:W x L (PKG) | 28VQFN: 36 mm2: 6 x 6(VQFN) |
| Power Consumption(Typ)(mW) | 110 |
| Rating | Catalog |
| Reference Mode | Ext Int |
| Resolution(Bits) | 16 |
| SINAD(dB) | 93.5 |
| SNR(dB) | 93.5 |
| Sample Rate (max)(SPS) | 600kSPS |
| THD(Typ)(dB) | -116 |
Eco Plan
| RoHS | Not Compliant |
| Pb Free | No |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: ADS8372EVM
ADS8372EVM Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Model Line
Series: ADS8372 (6)
- ADS8372IBRHPR ADS8372IBRHPRG4 ADS8372IBRHPT ADS8372IRHPR ADS8372IRHPRG4 ADS8372IRHPT
Manufacturer's Classification
- Semiconductors > Data Converters > Analog to Digital Converter > Precision ADC (<=10MSPS)
