Datasheet Texas Instruments TMS320DM369ZCE
| Manufacturer | Texas Instruments |
| Series | TMS320DM369 |
| Part Number | TMS320DM369ZCE |
DaVinci Digital Media Processor 338-NFBGA 0 to 85
Datasheets
TMS320DM369 Digital Media System-on-Chip (DMSoC) datasheet
PDF, 1.5 Mb, Revision: A, File published: Jul 12, 2016
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| Pin | 338 | 338 |
| Package Type | ZCE | ZCE |
| Industry STD Term | NFBGA | NFBGA |
| JEDEC Code | S-PBGA-N | S-PBGA-N |
| Package QTY | 160 | 160 |
| Carrier | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) |
| Device Marking | 570 | DM369ZCE |
| Width (mm) | 13 | 13 |
| Length (mm) | 13 | 13 |
| Thickness (mm) | .89 | .89 |
| Pitch (mm) | .65 | .65 |
| Max Height (mm) | 1.3 | 1.3 |
| Mechanical Data | Download | Download |
Parametrics
| ARM CPU | 1 ARM9 |
| ARM MHz | 432 Max. |
| Applications | Consumer Electronics,Industrial Cameras,Security, Video and Imaging, Portable Cameras,Video Surveillance IP Cameras |
| DRAM | LPDDR,DDR2 |
| EMAC | 10/100 |
| I2C | 1 |
| Operating Systems | Linux |
| Operating Temperature Range | -40 to 85,0 to 85 C |
| Pin/Package | 338NFBGA |
| Rating | Catalog |
| SPI | 5 |
| UART | 2 SCI |
| USB | USB2.0 HS OTG |
| Video Acceleration | 1 MJCP,1 HDVICP |
| Video Port | 1 Dedicated Input,1 Dedicated Output Configurable |
| Video Resolution/Frame Rate | 1080P,30 FPS or less |
Eco Plan
| RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: TMDXEVM368
TMS320DM36x Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- TMS320DM36x SoC Architecture and ThroughputPDF, 5.8 Mb, File published: Jul 29, 2009
This application report provides information on the DM36x throughput performance and describes the DM36x System-on-Chip (SoC) architecture, data path infrastructure, and constraints that affect the throughput and different optimization techniques for optimum system performance. This document also provides information on the maximum possible throughput performance of different peripherals on the So - Converting single-ended video to differential video in single-supply systemsPDF, 212 Kb, File published: Sep 16, 2011
- Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A)PDF, 93 Kb, Revision: A, File published: Jul 17, 2008
This application report motivates the way the DDR high-speed timing requirements are now going to be communicated to system designers. The traditional method of using data sheet parameters and simulation models is tedious. The system designer uses this information to evaluate whether timing specifications are met and can be expected to operate reliably.Ultimately, the real question the hardwa - High-Speed Interface Layout Guidelines (Rev. G)PDF, 814 Kb, Revision: G, File published: Jul 27, 2017
As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
Model Line
Series: TMS320DM369 (4)
- TMS320DM369ZCE TMS320DM369ZCED TMS320DM369ZCEDF TMS320DM369ZCEF
Manufacturer's Classification
- Semiconductors > Processors > Digital Signal Processors > Media Processors > Digital Video Processors
