Datasheet Texas Instruments 74AC11074

ManufacturerTexas Instruments
Series74AC11074
Datasheet Texas Instruments 74AC11074

Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset

Datasheets

Dual D-Type Positive-Edge-Triggered Flip-Flop With Clear And Preset datasheet
PDF, 667 Kb, Revision: A, File published: Apr 1, 1996
Extract from the document

Prices

Status

74AC11074D74AC11074DE474AC11074DR74AC11074DRG474AC11074N74AC11074PWLE74AC11074PWR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoYesNoNoNo

Packaging

74AC11074D74AC11074DE474AC11074DR74AC11074DRG474AC11074N74AC11074PWLE74AC11074PWR
N1234567
Pin14141414141414
Package TypeDDDDNPWPW
Industry STD TermSOICSOICSOICSOICPDIPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-TR-PDSO-GR-PDSO-G
Package QTY505025002500252000
CarrierTUBETUBELARGE T&RLARGE T&RTUBELARGE T&R
Device MarkingAC11074AC11074AC11074AC1107474AC11074NAE074
Width (mm)3.913.913.913.916.354.44.4
Length (mm)8.658.658.658.6519.355
Thickness (mm)1.581.581.581.583.911
Pitch (mm)1.271.271.271.272.54.65.65
Max Height (mm)1.751.751.751.755.081.21.2
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / Models74AC11074D
74AC11074D
74AC11074DE4
74AC11074DE4
74AC11074DR
74AC11074DR
74AC11074DRG4
74AC11074DRG4
74AC11074N
74AC11074N
74AC11074PWLE
74AC11074PWLE
74AC11074PWR
74AC11074PWR
3-State OutputNoNoNoNoNoNoNo
Approx. Price (US$)0.71 | 1ku
Bits222222
Bits(#)2
F @ Nom Voltage(Max), Mhz100100100100100100
F @ Nom Voltage(Max)(Mhz)100
ICC @ Nom Voltage(Max), mA0.040.040.040.040.040.04
ICC @ Nom Voltage(Max)(mA)0.04
Input TypeCMOS
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-2424/-24
Output Drive (IOL/IOH)(Max)(mA)24/-24
Output TypeCMOS
Package GroupSOICSOICSOICSOICPDIPTSSOPTSSOP
Package Size: mm2:W x L, PKG14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)See datasheet (PDIP)14TSSOP: 32 mm2: 6.4 x 5(TSSOP)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNo
Technology FamilyACACACACACACAC
VCC(Max), V5.55.55.55.55.55.5
VCC(Max)(V)5.5
VCC(Min), V333333
VCC(Min)(V)3
Voltage(Nom), V3.3,53.3,53.3,53.3,53.3,53.3,5
Voltage(Nom)(V)3.3
5
tpd @ Nom Voltage(Max), ns11.4,8.211.4,8.211.4,8.211.4,8.211.4,8.211.4,8.2
tpd @ Nom Voltage(Max)(ns)11.4
8.2

Eco Plan

74AC11074D74AC11074DE474AC11074DR74AC11074DRG474AC11074N74AC11074PWLE74AC11074PWR
RoHSCompliantCompliantCompliantCompliantCompliantNot CompliantCompliant
Pb FreeNoYes

Application Notes

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    PDF, 150 Kb, File published: Oct 1, 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
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  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, Revision: C, File published: Dec 2, 2015
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, File published: Aug 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
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    PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
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    PDF, 1.7 Mb, File published: Oct 1, 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou
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    PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
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    PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
  • Shelf-Life Evaluation of Lead-Free Component Finishes
    PDF, 1.3 Mb, File published: May 24, 2004
    The integrated circuit (IC) industry is converting to lead (Pb)-free termination finishes for leadframe-based packages. IC component users need to know the maximum length of time that components can be stored prior to being soldered. This study predicts shelf life of the primary Pb-free finishes being proposed by the industry. Components were exposed to a controlled environment, with known aging a

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop