Datasheet Texas Instruments ADS42JB49

ManufacturerTexas Instruments
SeriesADS42JB49
Datasheet Texas Instruments ADS42JB49

Dual-Channel, 14-Bit, 250-MSPS Analog-to-Digital Converter (ADC)

Datasheets

ADS42JBx9 Dual-Channel, 14- and 16-Bit, 250-MSPS Analog-to-Digital Converters datasheet
PDF, 5.3 Mb, Revision: F, File published: Dec 22, 2014
Extract from the document

Prices

Status

ADS42JB49IRGC25ADS42JB49IRGCRADS42JB49IRGCT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoYes

Packaging

ADS42JB49IRGC25ADS42JB49IRGCRADS42JB49IRGCT
N123
Pin646464
Package TypeRGCRGCRGC
Industry STD TermVQFNVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY252000250
CarrierSMALL T&RLARGE T&RSMALL T&R
Device MarkingAZ42JB49AZ42JB49AZ42JB49
Width (mm)999
Length (mm)999
Thickness (mm).88.88.88
Pitch (mm).5.5.5
Max Height (mm)111
Mechanical DataDownloadDownloadDownload

Parametrics

Parameters / ModelsADS42JB49IRGC25
ADS42JB49IRGC25
ADS42JB49IRGCR
ADS42JB49IRGCR
ADS42JB49IRGCT
ADS42JB49IRGCT
# Input Channels222
Analog Input BW, MHz900900900
ArchitecturePipelinePipelinePipeline
DNL(Typ), +/-LSB0.60.60.6
ENOB, Bits12.112.112.1
INL(Max), +/-LSB888
INL(Typ), +/-LSB333
Input BufferYesYesYes
Input Range, Vp-p2.52.52.5
InterfaceJESD204BJESD204BJESD204B
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Package GroupVQFNVQFNVQFN
Package Size: mm2:W x L, PKG64VQFN: 81 mm2: 9 x 9(VQFN)64VQFN: 81 mm2: 9 x 9(VQFN)64VQFN: 81 mm2: 9 x 9(VQFN)
Power Consumption(Typ), mW170017001700
RatingCatalogCatalogCatalog
Reference ModeIntIntInt
Resolution, Bits141414
SFDR, dB959595
SINAD, dB74.874.874.8
SNR, dB757575
Sample Rate(Max), MSPS250250250

Eco Plan

ADS42JB49IRGC25ADS42JB49IRGCRADS42JB49IRGCT
RoHSCompliantCompliantCompliant

Application Notes

  • Correcting the Low-Frequency Response of the ADS42LBxx, ADS42JBxx for Time-Domai
    PDF, 338 Kb, File published: May 2, 2016
    In this application report, simple schemes are described to correct the low-frequency response of ADS42LBxx, ADS42JBxx family of analog-to-digital converters (ADCs). The described schemes are useful for time-domain applications where the ADC samples a low-frequency pulse signal. These schemes are simple to implement in either analog or digital domains with minimal changes to the bill of materials
  • LMK04828 as a Clock Source for the ADS42JB69
    PDF, 1.4 Mb, File published: Nov 14, 2012
    ADS42JB69, ADS42LB69, LMK04828 LMK04828 as a clock source for the ADS42JB69
  • Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
    PDF, 1.2 Mb, Revision: A, File published: Jul 19, 2013
  • Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
    PDF, 2.0 Mb, Revision: A, File published: May 22, 2015
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, File published: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, File published: Apr 16, 2015

Model Line

Manufacturer's Classification

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)