Datasheet Texas Instruments ADS7882

ManufacturerTexas Instruments
SeriesADS7882
Datasheet Texas Instruments ADS7882

2.7V-5.25V Digital, 5V Analog, 12 Bit, 3MSPS, Parallel ADC with Ref

Datasheets

12-Bit, 3-MSPS, Low Power SAR Analog-to-Digital Converter datasheet
PDF, 1.0 Mb, File published: Dec 12, 2008
Extract from the document

Prices

Status

ADS7882IPFBRADS7882IPFBT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNo

Packaging

ADS7882IPFBRADS7882IPFBT
N12
Pin4848
Package TypePFBPFB
Industry STD TermTQFPTQFP
JEDEC CodeS-PQFP-GS-PQFP-G
Package QTY1000250
CarrierLARGE T&RSMALL T&R
Device MarkingADS7882ADS7882
Width (mm)77
Length (mm)77
Thickness (mm)11
Pitch (mm).5.5
Max Height (mm)1.21.2
Mechanical DataDownloadDownload

Parametrics

Parameters / ModelsADS7882IPFBR
ADS7882IPFBR
ADS7882IPFBT
ADS7882IPFBT
# Input Channels11
Analog Voltage AVDD(Max), V5.255.25
Analog Voltage AVDD(Min), V4.754.75
ArchitectureSARSAR
Digital Supply(Max), V5.255.25
Digital Supply(Min), V2.72.7
INL(Max), +/-LSB44
Input Range(Max), V2.62.6
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesOscillatorOscillator
InterfaceParallelParallel
Multi-Channel ConfigurationN/AN/A
Operating Temperature Range, C-40 to 85-40 to 85
Package GroupTQFPTQFP
Package Size: mm2:W x L, PKG48TQFP: 81 mm2: 9 x 9(TQFP)48TQFP: 81 mm2: 9 x 9(TQFP)
Power Consumption(Typ), mW8585
RatingCatalogCatalog
Reference ModeExt,IntExt,Int
Resolution, Bits1212
SINAD, dB68.568.5
SNR, dB69.569.5
Sample Rate (max), SPS3MSPS3MSPS
Sample Rate(Max), MSPS33
THD(Typ), dB-79.5-79.5

Eco Plan

ADS7882IPFBRADS7882IPFBT
RoHSCompliantCompliant

Application Notes

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, File published: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, File published: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, File published: Apr 16, 2015

Model Line

Series: ADS7882 (2)

Manufacturer's Classification

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)