Datasheet Texas Instruments ADS8365
| Manufacturer | Texas Instruments |
| Series | ADS8365 |
16-Bit 250kSPS 6-Ch Simultaneous Sampling SAR ADC
Datasheets
16-Bit, 250kSPS 6-Channel Simultaneous Sampling SAR Analog-to-Digital Converters datasheet
PDF, 988 Kb, Revision: C, File published: Mar 27, 2008
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Prices
Status
| ADS8365IPAG | ADS8365IPAGG4 | ADS8365IPAGR | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes | No |
Packaging
| ADS8365IPAG | ADS8365IPAGG4 | ADS8365IPAGR | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 64 | 64 | 64 |
| Package Type | PAG | PAG | PAG |
| Industry STD Term | TQFP | TQFP | TQFP |
| JEDEC Code | S-PQFP-G | S-PQFP-G | S-PQFP-G |
| Package QTY | 160 | 160 | 1500 |
| Carrier | JEDEC TRAY (10+1) | JEDEC TRAY (10+1) | LARGE T&R |
| Device Marking | ADS8365AI | ADS8365AI | ADS8365AI |
| Width (mm) | 10 | 10 | 10 |
| Length (mm) | 10 | 10 | 10 |
| Thickness (mm) | 1 | 1 | 1 |
| Pitch (mm) | .5 | .5 | .5 |
| Max Height (mm) | 1.2 | 1.2 | 1.2 |
| Mechanical Data | Download | Download | Download |
Parametrics
| Parameters / Models | ADS8365IPAG | ADS8365IPAGG4 | ADS8365IPAGR |
|---|---|---|---|
| # Input Channels | 6 | 6 | 6 |
| Analog Voltage AVDD(Max), V | 5.25 | 5.25 | 5.25 |
| Analog Voltage AVDD(Min), V | 4.75 | 4.75 | 4.75 |
| Architecture | SAR | SAR | SAR |
| Digital Supply(Max), V | 5.5 | 5.5 | 5.5 |
| Digital Supply(Min), V | 2.7 | 2.7 | 2.7 |
| INL(Max), +/-LSB | 4 | 4 | 4 |
| Input Range(Max), V | 2.6 | 2.6 | 2.6 |
| Input Range(Min), V | -2.6 | -2.6 | -2.6 |
| Input Type | Pseudo-Differential | Pseudo-Differential | Pseudo-Differential |
| Integrated Features | N/A | N/A | N/A |
| Interface | Parallel | Parallel | Parallel |
| Multi-Channel Configuration | Simultaneous Sampling | Simultaneous Sampling | Simultaneous Sampling |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 |
| Package Group | TQFP | TQFP | TQFP |
| Package Size: mm2:W x L, PKG | 64TQFP: 144 mm2: 12 x 12(TQFP) | 64TQFP: 144 mm2: 12 x 12(TQFP) | 64TQFP: 144 mm2: 12 x 12(TQFP) |
| Power Consumption(Typ), mW | 190 | 190 | 190 |
| Rating | Catalog | Catalog | Catalog |
| Reference Mode | Ext,Int | Ext,Int | Ext,Int |
| Resolution, Bits | 16 | 16 | 16 |
| SINAD, dB | 87 | 87 | 87 |
| SNR, dB | 88 | 88 | 88 |
| Sample Rate (max), SPS | 250kSPS | 250kSPS | 250kSPS |
| Sample Rate(Max), MSPS | 0.25 | 0.25 | 0.25 |
| THD(Typ), dB | -94 | -94 | -94 |
Eco Plan
| ADS8365IPAG | ADS8365IPAGG4 | ADS8365IPAGR | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
Application Notes
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Model Line
Series: ADS8365 (3)
Manufacturer's Classification
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)
