Datasheet Texas Instruments ADS8383
| Manufacturer | Texas Instruments |
| Series | ADS8383 |
18 Bit 500KSPS Parallel ADC
Datasheets
18-Bit, 500-kHz, Unipolar Input, Micropower Sampling ADC Converter datasheet
PDF, 926 Kb, Revision: C, File published: Feb 14, 2005
Extract from the document
Prices
Status
| ADS8383IBPFBT | |
|---|---|
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| ADS8383IBPFBT | |
|---|---|
| N | 1 |
| Pin | 48 |
| Package Type | PFB |
| Industry STD Term | TQFP |
| JEDEC Code | S-PQFP-G |
| Package QTY | 250 |
| Carrier | SMALL T&R |
| Device Marking | ADS8383I |
| Width (mm) | 7 |
| Length (mm) | 7 |
| Thickness (mm) | 1 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Download |
Parametrics
| Parameters / Models | ADS8383IBPFBT |
|---|---|
| # Input Channels | 1 |
| Analog Voltage AVDD(Max), V | 5.25 |
| Analog Voltage AVDD(Min), V | 4.75 |
| Architecture | SAR |
| Digital Supply(Max), V | 5.25 |
| Digital Supply(Min), V | 2.95 |
| INL(Max), +/-LSB | 4 |
| Input Range(Max), V | 4.2 |
| Input Type | Pseudo-Differential,Single-Ended |
| Integrated Features | Oscillator |
| Interface | SPI |
| Multi-Channel Configuration | N/A |
| Operating Temperature Range, C | -40 to 85 |
| Package Group | TQFP |
| Package Size: mm2:W x L, PKG | 48TQFP: 81 mm2: 9 x 9(TQFP) |
| Power Consumption(Typ), mW | 110 |
| Rating | Catalog |
| Reference Mode | Ext |
| Resolution, Bits | 18 |
| SINAD, dB | 87 |
| SNR, dB | 88 |
| Sample Rate (max), SPS | 500kSPS |
| Sample Rate(Max), MSPS | 0.5 |
| THD(Typ), dB | -112 |
Eco Plan
| ADS8383IBPFBT | |
|---|---|
| RoHS | Compliant |
Application Notes
- Interfacing the ADS8383 to TMS320C6711 DSPPDF, 1.3 Mb, File published: Jun 4, 2003
This application note presents a software and hardware interface of the ADS8383 18-bit 500 kHz analog-to-digital converter to the TMS320C6711 DSP. The hardware platform used to develop this application is ADS8383EVM and TMS320C6711 DSK. The software developed reads 1024 blocks of samples continuously from ADS8383. In an effort to reduce development time, the source code is available on TI's websit - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Model Line
Series: ADS8383 (1)
Manufacturer's Classification
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)
