Datasheet Texas Instruments ADS8411

ManufacturerTexas Instruments
SeriesADS8411
Datasheet Texas Instruments ADS8411

16-Bit, 2MSPS ADC with P8/P16 Parallel Output, Internal Clock & Internal Reference

Datasheets

16-Bit, 2 MSPS, Unipolar Input, Micropower Sampling Analog to Digital Converter datasheet
PDF, 1.5 Mb, Revision: B, File published: Dec 17, 2004
Extract from the document

Prices

Status

ADS8411IBPFBRADS8411IBPFBTADS8411IPFBT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNo

Packaging

ADS8411IBPFBRADS8411IBPFBTADS8411IPFBT
N123
Pin484848
Package TypePFBPFBPFB
Industry STD TermTQFPTQFPTQFP
JEDEC CodeS-PQFP-GS-PQFP-GS-PQFP-G
Package QTY1000250250
CarrierLARGE T&RSMALL T&RSMALL T&R
Device MarkingBADS8411IADS8411I
Width (mm)777
Length (mm)777
Thickness (mm)111
Pitch (mm).5.5.5
Max Height (mm)1.21.21.2
Mechanical DataDownloadDownloadDownload

Parametrics

Parameters / ModelsADS8411IBPFBR
ADS8411IBPFBR
ADS8411IBPFBT
ADS8411IBPFBT
ADS8411IPFBT
ADS8411IPFBT
# Input Channels111
Analog Voltage AVDD(Max), V5.255.255.25
Analog Voltage AVDD(Min), V4.754.754.75
ArchitectureSARSARSAR
Digital Supply(Max), V5.255.255.25
Digital Supply(Min), V2.72.72.7
INL(Max), +/-LSB2.52.52.5
Input Range(Max), V4.14.14.1
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesOscillatorOscillatorOscillator
InterfaceParallelParallelParallel
Multi-Channel ConfigurationN/AN/AN/A
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Package GroupTQFPTQFPTQFP
Package Size: mm2:W x L, PKG48TQFP: 81 mm2: 9 x 9(TQFP)48TQFP: 81 mm2: 9 x 9(TQFP)48TQFP: 81 mm2: 9 x 9(TQFP)
Power Consumption(Typ), mW155155155
RatingCatalogCatalogCatalog
Reference ModeExt,IntExt,IntExt,Int
Resolution, Bits161616
SINAD, dB858585
SNR, dB868686
Sample Rate (max), SPS2MSPS2MSPS2MSPS
Sample Rate(Max), MSPS222
THD(Typ), dB-90-90-90

Eco Plan

ADS8411IBPFBRADS8411IBPFBTADS8411IPFBT
RoHSCompliantCompliantCompliant

Application Notes

  • Using ADS8411/2 (16-Bit 2MSPS SAR) as a Serial ADC
    PDF, 438 Kb, File published: May 24, 2004
    This application report discusses how to use a parallel ADC as a serial ADC by using a low-cost CPLD. This concept is tested with a Texas Instruments ADS8411/12 (16-bit, 2 MSPS SAR ADC) and an Altera(TM) MAX 3000A CPLD. A full solution with a schematic, layout, and software for programming the CPLD is presented at the end of the report.
  • Interfacing the ADS8401/ADS8411 to TMS320C6713 DSP
    PDF, 260 Kb, File published: Sep 23, 2004
    This application report presents a solution for interfacing the ADS8401 and ADS8411 16-bit, parallel interface converters to the TMS320C6713 DSP. The hardware solution consists of existing hardware, specifically the ADS8411EVM, 'C6713 DSK, and 5-6K interface board. The software demonstrates how to use an EDMA ping-pong buffer and Timer1 peripherals to collect data at 2 MSPS. Discussed also are som
  • Accurately measuring ADC driving-circuit settling time (Rev. A)
    PDF, 107 Kb, Revision: A, File published: May 18, 2015
  • Using ADS8411 in a Multiplexed Analog Input Application (Rev. A)
    PDF, 2.1 Mb, Revision: A, File published: Feb 15, 2006
    This application report is intended as a guide for using an analog multiplexer to multiplex several input signals to a single high-resolution, high-speed SAR analog-to-digital converter (ADC). The ADC and the multiplexer used were the ADS8411 and the TS5A3159/3359, respectively. This document discusses the important parameters of a multiplexer and defines a few important measurements for evaluatin
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, File published: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

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Manufacturer's Classification

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)