Datasheet Texas Instruments ADS8482

ManufacturerTexas Instruments
SeriesADS8482
Datasheet Texas Instruments ADS8482

18 Bit 1MSPS Parallel ADC W/Ref, Pseudo Bipolar, Fully Differential Input

Datasheets

18-Bit 1-MSPS Differential Input, Micropower Samp Analog-to-Digital Converter datasheet
PDF, 1.2 Mb, Revision: A, File published: Jun 6, 2006
Extract from the document

Prices

Status

ADS8482IBRGZTADS8482IRGZT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNo

Packaging

ADS8482IBRGZTADS8482IRGZT
N12
Pin4848
Package TypeRGZRGZ
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY250250
CarrierSMALL T&RSMALL T&R
Device Marking8482IADS
Width (mm)77
Length (mm)77
Thickness (mm).9.9
Pitch (mm).5.5
Max Height (mm)11
Mechanical DataDownloadDownload

Parametrics

Parameters / ModelsADS8482IBRGZT
ADS8482IBRGZT
ADS8482IRGZT
ADS8482IRGZT
# Input Channels11
Analog Voltage AVDD(Max), V5.255.25
Analog Voltage AVDD(Min), V4.754.75
ArchitectureSARSAR
Digital Supply(Max), V5.255.25
Digital Supply(Min), V2.72.7
INL(Max), +/-LSB2.52.5
Input Range(Max), V4.0964.096
Input Range(Min), V4.0964.096
Input TypeDifferentialDifferential
Integrated FeaturesOscillatorOscillator
InterfaceParallelParallel
Multi-Channel ConfigurationN/AN/A
Operating Temperature Range, C-40 to 85-40 to 85
Package GroupVQFNVQFN
Package Size: mm2:W x L, PKG48VQFN: 49 mm2: 7 x 7(VQFN)48VQFN: 49 mm2: 7 x 7(VQFN)
Power Consumption(Typ), mW225225
RatingCatalogCatalog
Reference ModeExt,IntExt,Int
Resolution, Bits1818
SINAD, dB9999
SNR, dB9999
Sample Rate (max), SPS1MSPS1MSPS
Sample Rate(Max), MSPS11
THD(Typ), dB-121-121

Eco Plan

ADS8482IBRGZTADS8482IRGZT
RoHSCompliantCompliant

Application Notes

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, File published: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Model Line

Series: ADS8482 (2)

Manufacturer's Classification

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)