Datasheet Texas Instruments AM1806
Manufacturer | Texas Instruments |
Series | AM1806 |
Sitara Processor
Datasheets
AM1806 ARM Microprocessor datasheet
PDF, 1.8 Mb, Revision: F, File published: Mar 21, 2014
Extract from the document
Prices
Status
AM1806BZCE3 | AM1806BZCE4 | AM1806BZCEA3 | AM1806BZCED4 | AM1806BZWT3 | AM1806BZWT4 | AM1806BZWTD4 | AM1806EZCE3 | AM1806EZCE4 | AM1806EZCEA3 | AM1806EZCED4 | AM1806EZWT3 | AM1806EZWT4 | AM1806EZWTD4 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) | Obsolete (Manufacturer has discontinued the production of the device) | Obsolete (Manufacturer has discontinued the production of the device) | Obsolete (Manufacturer has discontinued the production of the device) | Obsolete (Manufacturer has discontinued the production of the device) | Obsolete (Manufacturer has discontinued the production of the device) | Obsolete (Manufacturer has discontinued the production of the device) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No | Yes | Yes | No | No | No | Yes | Yes | No | Yes | No | No | No |
Packaging
AM1806BZCE3 | AM1806BZCE4 | AM1806BZCEA3 | AM1806BZCED4 | AM1806BZWT3 | AM1806BZWT4 | AM1806BZWTD4 | AM1806EZCE3 | AM1806EZCE4 | AM1806EZCEA3 | AM1806EZCED4 | AM1806EZWT3 | AM1806EZWT4 | AM1806EZWTD4 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 |
Pin | 361 | 361 | 361 | 361 | 361 | 361 | 361 | 361 | 361 | 361 | 361 | 361 | 361 | 361 |
Package Type | ZCE | ZCE | ZCE | ZCE | ZWT | ZWT | ZWT | ZCE | ZCE | ZCE | ZCE | ZWT | ZWT | ZWT |
Industry STD Term | NFBGA | NFBGA | NFBGA | NFBGA | NFBGA | NFBGA | NFBGA | NFBGA | NFBGA | NFBGA | NFBGA | NFBGA | NFBGA | NFBGA |
JEDEC Code | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N |
Carrier | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) | ||||||
Device Marking | AM1806B | 456 | AM1806B | D456 | ZWT | AM1806B | D456 | AM1806E | 456 | ZCE | ZCE | 375 | 456 | ZWT |
Width (mm) | 13 | 13 | 13 | 13 | 16 | 16 | 16 | 13 | 13 | 13 | 13 | 16 | 16 | 16 |
Length (mm) | 13 | 13 | 13 | 13 | 16 | 16 | 16 | 13 | 13 | 13 | 13 | 16 | 16 | 16 |
Thickness (mm) | .89 | .89 | .89 | .89 | .9 | .9 | .9 | .89 | .89 | .89 | .89 | .9 | .9 | .9 |
Pitch (mm) | .65 | .65 | .65 | .65 | .8 | .8 | .8 | .65 | .65 | .65 | .65 | .8 | .8 | .8 |
Max Height (mm) | 1.3 | 1.3 | 1.3 | 1.3 | 1.4 | 1.4 | 1.4 | 1.3 | 1.3 | 1.3 | 1.3 | 1.4 | 1.4 | 1.4 |
Mechanical Data | Download | Download | Download | Download | Download | Download | Download | Download | Download | Download | Download | Download | Download | Download |
Package QTY | 160 | 160 | 160 | 160 | 90 | 90 | 90 |
Parametrics
Parameters / Models | AM1806BZCE3 | AM1806BZCE4 | AM1806BZCEA3 | AM1806BZCED4 | AM1806BZWT3 | AM1806BZWT4 | AM1806BZWTD4 | AM1806EZCE3 | AM1806EZCE4 | AM1806EZCEA3 | AM1806EZCED4 | AM1806EZWT3 | AM1806EZWT4 | AM1806EZWTD4 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ARM CPU | 1 ARM9 | 1 ARM9 | 1 ARM9 | 1 ARM9 | 1 ARM9 | 1 ARM9 | 1 ARM9 | 1 ARM9 | 1 ARM9 | 1 ARM9 | 1 ARM9 | 1 ARM9 | 1 ARM9 | 1 ARM9 |
ARM MHz, Max. | 375,456 | 375,456 | 375,456 | 375,456 | 375,456 | 375,456 | 375,456 | 375,456 | 375,456 | 375,456 | 375,456 | 375,456 | 375,456 | 375,456 |
Applications | Industrial,Personal Electronics | Industrial,Personal Electronics | Industrial,Personal Electronics | Industrial,Personal Electronics | Industrial,Personal Electronics | Industrial,Personal Electronics | Industrial,Personal Electronics | Industrial,Personal Electronics | Industrial,Personal Electronics | Industrial,Personal Electronics | Industrial,Personal Electronics | Industrial,Personal Electronics | Industrial,Personal Electronics | Industrial,Personal Electronics |
DRAM | DDR2,LPDDR | DDR2,LPDDR | DDR2,LPDDR | DDR2,LPDDR | DDR2,LPDDR | DDR2,LPDDR | DDR2,LPDDR | DDR2,LPDDR | DDR2,LPDDR | DDR2,LPDDR | DDR2,LPDDR | DDR2,LPDDR | DDR2,LPDDR | DDR2,LPDDR |
Display Options | LCD | LCD | LCD | LCD | LCD | LCD | LCD | LCD | LCD | LCD | LCD | LCD | LCD | LCD |
EMAC | No | No | No | No | No | No | No | No | No | No | No | No | No | No |
I2C | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
On-Chip L2 Cache | 128 KB (ARM9) | 128 KB (ARM9) | 128 KB (ARM9) | 128 KB (ARM9) | 128 KB (ARM9) | 128 KB (ARM9) | 128 KB (ARM9) | 128 KB (ARM9) | 128 KB (ARM9) | 128 KB (ARM9) | 128 KB (ARM9) | 128 KB (ARM9) | 128 KB (ARM9) | 128 KB (ARM9) |
Operating Systems | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE | Android,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE |
Operating Temperature Range, C | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 | -40 to 105,0 to 90,-40 to 90 |
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
SPI | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
UART, SCI | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
USB | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Eco Plan
AM1806BZCE3 | AM1806BZCE4 | AM1806BZCEA3 | AM1806BZCED4 | AM1806BZWT3 | AM1806BZWT4 | AM1806BZWTD4 | AM1806EZCE3 | AM1806EZCE4 | AM1806EZCEA3 | AM1806EZCED4 | AM1806EZWT3 | AM1806EZWT4 | AM1806EZWTD4 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
RoHS | Not Compliant | Not Compliant | Not Compliant | Not Compliant | Compliant | Not Compliant | Not Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Application Notes
- Powering the AM1806, AM1808, and AM1810 with the TPS650061PDF, 461 Kb, File published: Sep 6, 2011
- AM18x Power Consumption SummaryPDF, 19 Kb, File published: Aug 30, 2010
This article discusses the power consumption of the Texas Instruments AM18x. Power consumption on the AM18x devices are highly application-dependent. The low-core voltage and other power design optimizations allow these devices to operate with industry-leading performance, while maintaining a low power-to-performance ratio.The power data presented in this document are based on measured data w - AM18xx Pin Multiplexing Utility (Rev. A)PDF, 32 Kb, Revision: A, File published: Dec 6, 2011
The AM18xx devices use a great deal of internal pin multiplexing to allow the most functionality in the smallest and lowest cost package. This software allows the pin multiplexing registers of the device to be calculated with ease, as well as showing what peripherals can be used together and what devices support the peripherals that are selected. This software is useful to anyone creating a system - Using the AM18xx Bootloader (Rev. C)PDF, 1.6 Mb, Revision: C, File published: Jan 23, 2014
This application report describes various boot mechanisms supported by the AM18xx bootloader read-only memory (ROM) image. Topics covered include the Application Image Script (AIS) boot process, an AISgen tool used to generate boot scripts, protocol for booting the device from an external master device, a UART Boot Host GUI for booting the device from a host PC, and any limitations, default settin - WiLink 6.0 (WL1271) OpenLink Platform (Rev. A)PDF, 735 Kb, Revision: A, File published: Apr 26, 2011
- OMAP-L1x8 Complementary ProductsPDF, 26 Kb, File published: Jul 20, 2009
This article has been contributed to the TI DaVinciв„ў and OMAPв„ў Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://tiexpressdsp.com/index.php/OMAP-L1x8_Complementary_Products .This Wiki article serves as a repository of complimentary devices that ca - Powering OMAP-L132/L138, C6742/4/6, and AM18x with TPS65070 (Rev. B)PDF, 453 Kb, Revision: B, File published: Aug 29, 2011
This documents details the design consideration of a power management unit (PMU) solution for the OMAP-L132/-L138 low-power applications processors with a TPS65070 five-channel power management device. - OMAP-L13x/AM1x Linux PSP OverviewPDF, 20 Kb, File published: Aug 18, 2010
This article has been contributed to the Texas Instrument's Embedded Processors Wiki site:http://processors.wiki.ti.com/index.php/Community_Linux_PSP_for_DA8x/OMAP-L1/AM1xThe Linux Platform Support Package (PSP) for Sitara AM1x and OMAP-L13x provides support for Linux kernel, U-Boot, UBL and - Medium Integrated Power Solution Using a Dual DC/DC Converter and an LDO (Rev. B)PDF, 387 Kb, Revision: B, File published: Aug 29, 2011
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, or OMAP-L132/L138 processor. Using sequenced power supplies, this reference design describes a system having a 3.3-V input voltage and a high-efficiency dc/dc converter with integrated FETs for a small, simple design.Sequenced power supply architectures are becoming commonplace in high-performan - High-Vin, High-Efficiency Power Solution Using DC/DC Converter With DVFS (Rev. C)PDF, 266 Kb, Revision: C, File published: Aug 29, 2011
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, or OMAP-L132/L138 processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with integrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply architec - Simple Power Solution Using LDOs (Rev. B)PDF, 150 Kb, Revision: B, File published: Aug 29, 2011
This reference design helps those desiring to design-in the TMS320C6742, TMS320C6746, TMS320C6748, and OMAP-L132/L138. This design, employing sequenced power supplies, describes asystem with an input voltage of 3.3 V, and uses LDOs for a small, simple system.Sequenced power supply architectures are becoming commonplace in high-performance microprocessor and digital signal processor (DSP) syste - High-Efficiency Power Solution Using DC/DC Converters With DVFS (Rev. A)PDF, 161 Kb, Revision: A, File published: May 5, 2010
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, OMAP-L138 or AM18x processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with ntegrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply archit - TMS320C6748/46/42 & OMAP-L132/L138 USB Downstream Host Compliance TestingPDF, 3.6 Mb, File published: Aug 17, 2009
This application report describes the TMS320C6748/46/42 and OMAP-L1x8 embedded Host electrical compliance of a high-speed (HS) universal serial bus (USB) operation conforming to the USB 2.0 specification. The OTG controller supports the USB 2.0 device and host mode at high-speed (HS), full-speed (FS) and low-speed (LS). - TMS320C6748/46/42 & OMAP-L1x8 USB Upstream Device Compliance TestingPDF, 1.1 Mb, File published: Aug 17, 2009
This application report describes the TMS320C6748/46/42 and OMAP-L1x8 electrical compliance of a high-speed (HS) universal serial bus (USB) operation conforming to the USB 2.0 specification. The on-the-go (OTG) controller supports the USB 2.0 device and host mode at high-speed (HS), full-speed (FS) and low-speed (LS). - High-Integration, High-Efficiency Power Solution Using DC/DC Converters w/DVFS (Rev. A)PDF, 208 Kb, Revision: A, File published: May 5, 2010
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, OMAP-L138 or AM18x processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with ntegrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply archit - TMS320C674x/OMAP-L1x USB Compliance ChecklistPDF, 89 Kb, File published: Mar 12, 2009
This application report contains the USB checklist for the TMS320C674x/OMAP-L1x (C674x/OMAP-L1x). The C674x/OMAP-L1x has a compliant full-speed USB device port and does not support a low-speed USB device operation. - OMAP-L1x/C674x/AM1x SOC Architecture and Throughput OverviewPDF, 19 Kb, File published: Feb 12, 2010
This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://wiki.davincidsp.com/index.php/OMAP-L1x/C674x/AM1x_SOC_Architecture_and_Throughput_Overview. This collection of Wiki articles provide i - Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A)PDF, 93 Kb, Revision: A, File published: Jul 17, 2008
This application report motivates the way the DDR high-speed timing requirements are now going to be communicated to system designers. The traditional method of using data sheet parameters and simulation models is tedious. The system designer uses this information to evaluate whether timing specifications are met and can be expected to operate reliably.Ultimately, the real question the hardwa - High-Speed Interface Layout Guidelines (Rev. G)PDF, 814 Kb, Revision: G, File published: Jul 27, 2017
As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
Model Line
Series: AM1806 (14)
Manufacturer's Classification
- Semiconductors> Processors> Sitara Processors> ARM9> AM1x