Datasheet Texas Instruments CD4572UB

Manufacturer	Texas Instruments
Series	CD4572UB

CMOS Hex Gate (with 4 Inverters, One 2-Input NOR Gate, and One 2-Input NAND Gate)

Datasheets

PDF, 1.1 Mb, Revision: C, File published: Oct 13, 2003

Extract from the document

	CD4572UBE	CD4572UBEE4	CD4572UBM	CD4572UBME4	CD4572UBMG4	CD4572UBNSR	CD4572UBPWR	CD4572UBPWRE4
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	No	No	No	No	No	No	No	No

	CD4572UBE	CD4572UBEE4	CD4572UBM	CD4572UBME4	CD4572UBMG4	CD4572UBNSR	CD4572UBPWR	CD4572UBPWRE4
N	1	2	3	4	5	6	7	8
Pin	16	16	16	16	16	16	16	16
Package Type	N	N	D	D	D	NS	PW	PW
Industry STD Term	PDIP	PDIP	SOIC	SOIC	SOIC	SOP	TSSOP	TSSOP
JEDEC Code	R-PDIP-T	R-PDIP-T	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G
Package QTY	25	25	40	40	40	2000	2000	2000
Carrier	TUBE	TUBE	TUBE	TUBE	TUBE	LARGE T&R	LARGE T&R	LARGE T&R
Device Marking	CD4572UBE	CD4572UBE	CD4572UBM	CD4572UBM	CD4572UBM	CD4572UB	CM572UB	CM572UB
Width (mm)	6.35	6.35	3.91	3.91	3.91	5.3	4.4	4.4
Length (mm)	19.3	19.3	9.9	9.9	9.9	10.3	5	5
Thickness (mm)	3.9	3.9	1.58	1.58	1.58	1.95	1	1
Pitch (mm)	2.54	2.54	1.27	1.27	1.27	1.27	.65	.65
Max Height (mm)	5.08	5.08	1.75	1.75	1.75	2	1.2	1.2
Mechanical Data	Download	Download	Download	Download	Download	Download	Download	Download

Parameters / Models	CD4572UBE	CD4572UBEE4	CD4572UBM	CD4572UBME4	CD4572UBMG4	CD4572UBNSR	CD4572UBPWR	CD4572UBPWRE4
Bits	6	6	6	6	6	6	6	6
F @ Nom Voltage(Max), Mhz	8	8	8	8	8	8	8	8
ICC @ Nom Voltage(Max), mA	0.015	0.015	0.015	0.015	0.015	0.015	0.015	0.015
Operating Temperature Range, C	-55 to 125	-55 to 125	-55 to 125	-55 to 125	-55 to 125	-55 to 125	-55 to 125	-55 to 125
Output Drive (IOL/IOH)(Max), mA	4/-4	4/-4	4/-4	4/-4	4/-4	4/-4	4/-4	4/-4
Package Group	PDIP	PDIP	SOIC	SOIC	SOIC	SO	TSSOP	TSSOP
Package Size: mm2:W x L, PKG	See datasheet (PDIP)	See datasheet (PDIP)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SO: 80 mm2: 7.8 x 10.2(SO)	16TSSOP: 32 mm2: 6.4 x 5(TSSOP)	16TSSOP: 32 mm2: 6.4 x 5(TSSOP)
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Technology Family	CD4000	CD4000	CD4000	CD4000	CD4000	CD4000	CD4000	CD4000
VCC(Max), V	18	18	18	18	18	18	18	18
VCC(Min), V	3	3	3	3	3	3	3	3
Voltage(Nom), V	10	10	10	10	10	10	10	10
tpd @ Nom Voltage(Max), ns	110	110	110	110	110	110	110	110

	CD4572UBE	CD4572UBEE4	CD4572UBM	CD4572UBME4	CD4572UBMG4	CD4572UBNSR	CD4572UBPWR	CD4572UBPWRE4
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant
Pb Free	Yes	Yes

Download
Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics
PDF, 188 Kb, File published: Dec 3, 2001
Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb

Series: CD4572UB (8)