Datasheet Texas Instruments CD54AC109

Manufacturer	Texas Instruments
Series	CD54AC109

Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset

Datasheets

PDF, 901 Kb, File published: Jan 24, 2003

Extract from the document

	CD54AC109F3A
Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Parameters / Models	CD54AC109F3A
Bits	2
F @ Nom Voltage(Max), Mhz	100
ICC @ Nom Voltage(Max), mA	0.04
Input Type	LVTTL/CMOS
Operating Temperature Range, C	-55 to 125
Output Drive (IOL/IOH)(Max), mA	-24/24
Output Type	CMOS
Package Group	CDIP
Package Size: mm2:W x L, PKG	See datasheet (CDIP)
Rating	Military
Technology Family	AC
VCC(Max), V	5.5
VCC(Min), V	1.5
tpd @ Nom Voltage(Max), ns	11.1

	CD54AC109F3A
RoHS	See ti.com

Download
Power-Up Behavior of Clocked Devices (Rev. A)
PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
Download
Designing With Logic (Rev. C)
PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
Download
Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
PDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Series: CD54AC109 (1)

Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers