Datasheet Texas Instruments CD54AC374
Manufacturer | Texas Instruments |
Series | CD54AC374 |
Octal D-Type Flip-Flops with 3-State Outputs
Datasheets
Octal D-Type Flip-Flops, 3-State datasheet
PDF, 1.3 Mb, File published: Dec 3, 1998
Extract from the document
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Status
CD54AC374F3A | |
---|---|
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Packaging
CD54AC374F3A | |
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N | 1 |
Pin | 20 |
Package Type | J |
Industry STD Term | CDIP |
JEDEC Code | R-GDIP-T |
Package QTY | 1 |
Carrier | TUBE |
Device Marking | CD54AC374F3A |
Width (mm) | 6.92 |
Length (mm) | 24.2 |
Thickness (mm) | 4.57 |
Pitch (mm) | 2.54 |
Max Height (mm) | 5.08 |
Mechanical Data | Download |
Parametrics
Parameters / Models | CD54AC374F3A |
---|---|
3-State Output | Yes |
Bits | 8 |
F @ Nom Voltage(Max), Mhz | 100 |
ICC @ Nom Voltage(Max), mA | 0.08 |
Input Type | CMOS |
Operating Temperature Range, C | -55 to 125 |
Output Drive (IOL/IOH)(Max), mA | 24/-24 |
Output Type | CMOS |
Package Group | CDIP |
Package Size: mm2:W x L, PKG | See datasheet (CDIP) |
Rating | Military |
Technology Family | AC |
VCC(Max), V | 5.5 |
VCC(Min), V | 1.5 |
tpd @ Nom Voltage(Max), ns | 123,13.7,9.8 |
Eco Plan
CD54AC374F3A | |
---|---|
RoHS | See ti.com |
Application Notes
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
Model Line
Series: CD54AC374 (1)
Manufacturer's Classification
- Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers