Datasheet Texas Instruments CD54ACT174F3A
| Manufacturer | Texas Instruments |
| Series | CD54ACT174 |
| Part Number | CD54ACT174F3A |
Hex D Flip-Flops with Reset 16-CDIP -55 to 125
Datasheets
CD54ACT174, CD74ACT174 datasheet
PDF, 872 Kb, File published: Apr 9, 2003
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 16 |
| Package Type | J |
| Industry STD Term | CDIP |
| JEDEC Code | R-GDIP-T |
| Package QTY | 1 |
| Carrier | TUBE |
| Device Marking | CD54ACT174F3A |
| Width (mm) | 6.92 |
| Length (mm) | 19.56 |
| Thickness (mm) | 4.57 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 5.08 |
| Mechanical Data | Download |
Parametrics
| 3-State Output | No |
| Bits | 6 |
| F @ Nom Voltage(Max) | 90 Mhz |
| ICC @ Nom Voltage(Max) | 0.08 mA |
| Input Type | TTL |
| Operating Temperature Range | -55 to 125 C |
| Output Drive (IOL/IOH)(Max) | 24/-24 mA |
| Output Type | CMOS |
| Package Group | CDIP |
| Package Size: mm2:W x L | See datasheet (CDIP) PKG |
| Rating | Military |
| Technology Family | ACT |
| VCC(Max) | 5.5 V |
| VCC(Min) | 4.5 V |
| tpd @ Nom Voltage(Max) | 12.6 ns |
Eco Plan
| RoHS | See ti.com |
Application Notes
- Selecting the Right Level Translation Solution (Rev. A)PDF, 313 Kb, Revision: A, File published: Jun 22, 2004
Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati - CMOS Power Consumption and CPD Calculation (Rev. B)PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
- Designing With Logic (Rev. C)PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w - Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
Model Line
Series: CD54ACT174 (1)
- CD54ACT174F3A
Manufacturer's Classification
- Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers
