Datasheet Texas Instruments CD54HCT166
Manufacturer | Texas Instruments |
Series | CD54HCT166 |
High Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register
Datasheets
CD54HC166, CD74HC166, CD54HCT166, CD74HCT166 datasheet
PDF, 456 Kb, Revision: C, File published: Oct 13, 2003
Extract from the document
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Status
CD54HCT166F3A | |
---|---|
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Packaging
CD54HCT166F3A | |
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N | 1 |
Pin | 16 |
Package Type | J |
Industry STD Term | CDIP |
JEDEC Code | R-GDIP-T |
Package QTY | 1 |
Carrier | TUBE |
Device Marking | CD54HCT166F3A |
Width (mm) | 6.92 |
Length (mm) | 19.56 |
Thickness (mm) | 4.57 |
Pitch (mm) | 2.54 |
Max Height (mm) | 5.08 |
Mechanical Data | Download |
Parametrics
Parameters / Models | CD54HCT166F3A |
---|---|
3-State Output | No |
Bits | 8 |
F @ Nom Voltage(Max), Mhz | 25 |
ICC @ Nom Voltage(Max), mA | 0.08 |
Input Type | TTL |
Operating Temperature Range, C | -55 to 125 |
Output Drive (IOL/IOH)(Max), mA | 4/-4 |
Output Type | CMOS |
Package Group | CDIP |
Package Size: mm2:W x L, PKG | See datasheet (CDIP) |
Rating | Military |
Technology Family | HCT |
VCC(Max), V | 5.5 |
VCC(Min), V | 4.5 |
tpd @ Nom Voltage(Max), ns | 50 |
Eco Plan
CD54HCT166F3A | |
---|---|
RoHS | See ti.com |
Application Notes
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren - SN54/74HCT CMOS Logic Family Applications and RestrictionsPDF, 102 Kb, File published: May 1, 1996
The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
Model Line
Series: CD54HCT166 (1)
Manufacturer's Classification
- Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers