Datasheet Texas Instruments CD54HCT564

ManufacturerTexas Instruments
SeriesCD54HCT564
Datasheet Texas Instruments CD54HCT564

High Speed CMOS Logic Octal D-Type Positive-Edge Triggered Inverting Flip-Flops with 3-State Outputs

Datasheets

CD54/74HC534, CD54/74HCT534, CD54/74HC564, CD54/74HCT564 datasheet
PDF, 866 Kb, Revision: C, File published: Apr 22, 2004
Extract from the document

Prices

Status

CD54HCT564F3A
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

CD54HCT564F3A
N1
Pin20
Package TypeJ
Industry STD TermCDIP
JEDEC CodeR-GDIP-T
Package QTY1
CarrierTUBE
Device MarkingCD54HCT564F3A
Width (mm)6.92
Length (mm)24.2
Thickness (mm)4.57
Pitch (mm)2.54
Max Height (mm)5.08
Mechanical DataDownload

Parametrics

Parameters / ModelsCD54HCT564F3A
CD54HCT564F3A
3-State OutputYes
Bits8
F @ Nom Voltage(Max), Mhz25
ICC @ Nom Voltage(Max), mA0.08
Input TypeTTL
Operating Temperature Range, C-55 to 125
Output Drive (IOL/IOH)(Max), mA6/-6
Output TypeCMOS
Package GroupCDIP
Package Size: mm2:W x L, PKGSee datasheet (CDIP)
RatingMilitary
Technology FamilyHCT
VCC(Max), V5.5
VCC(Min), V4.5
tpd @ Nom Voltage(Max), ns44

Eco Plan

CD54HCT564F3A
RoHSSee ti.com

Application Notes

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
  • SN54/74HCT CMOS Logic Family Applications and Restrictions
    PDF, 102 Kb, File published: May 1, 1996
    The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal

Model Line

Series: CD54HCT564 (1)

Manufacturer's Classification

  • Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers