Datasheet Texas Instruments CD54HCT75F3A

ManufacturerTexas Instruments
SeriesCD54HCT75
Part NumberCD54HCT75F3A
Datasheet Texas Instruments CD54HCT75F3A

High Speed CMOS Logic Dual 2-Bit Bistable Transparent Latch 16-CDIP -55 to 125

Datasheets

CD54HC75, CD74HC75, CD54HCT75, CD74HCT75 datasheet
PDF, 694 Kb, Revision: F, File published: Oct 13, 2003
Extract from the document

Prices

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

Pin161616
Package TypeJJJ
Industry STD TermCDIPCDIPCDIP
JEDEC CodeR-GDIP-TR-GDIP-TR-GDIP-T
Package QTY111
CarrierTUBETUBETUBE
Device MarkingCD54HCT75F3AA5962-9075801ME
Width (mm)6.926.926.92
Length (mm)19.5619.5619.56
Thickness (mm)4.574.574.57
Pitch (mm)2.542.542.54
Max Height (mm)5.085.085.08
Mechanical DataDownloadDownloadDownload

Parametrics

3-State OutputNo
Bits4
F @ Nom Voltage(Max)25 Mhz
ICC @ Nom Voltage(Max)0.04 mA
Input TypeTTL
Operating Temperature Range-55 to 125 C
Output Drive (IOL/IOH)(Max)4/-4 mA
Output TypeCMOS
Package GroupCDIP
Package Size: mm2:W x LSee datasheet (CDIP) PKG
RatingMilitary
Technology FamilyHCT
VCC(Max)5.5 V
VCC(Min)4.5 V
tpd @ Nom Voltage(Max)35 ns

Eco Plan

RoHSSee ti.com

Application Notes

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
  • SN54/74HCT CMOS Logic Family Applications and Restrictions
    PDF, 102 Kb, File published: May 1, 1996
    The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal

Model Line

Series: CD54HCT75 (2)

Manufacturer's Classification

  • Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers