Datasheet Texas Instruments CD74AC174

ManufacturerTexas Instruments
SeriesCD74AC174
Datasheet Texas Instruments CD74AC174

Hex D-Type Flip-Flops with Reset

Datasheets

CD74AC174 datasheet
PDF, 825 Kb, File published: Apr 9, 2003
Extract from the document

Prices

Status

CD74AC174ECD74AC174MCD74AC174M96CD74AC174M96E4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNo

Packaging

CD74AC174ECD74AC174MCD74AC174M96CD74AC174M96E4
N1234
Pin16161616
Package TypeNDDD
Industry STD TermPDIPSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY254025002500
CarrierTUBETUBELARGE T&RLARGE T&R
Device MarkingCD74AC174EAC174MAC174MAC174M
Width (mm)6.353.913.913.91
Length (mm)19.39.99.99.9
Thickness (mm)3.91.581.581.58
Pitch (mm)2.541.271.271.27
Max Height (mm)5.081.751.751.75
Mechanical DataDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsCD74AC174E
CD74AC174E
CD74AC174M
CD74AC174M
CD74AC174M96
CD74AC174M96
CD74AC174M96E4
CD74AC174M96E4
3-State OutputNoNoNoNo
Bits6666
F @ Nom Voltage(Max), Mhz100100100100
ICC @ Nom Voltage(Max), mA0.080.080.080.08
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-24
Package GroupPDIPSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)
RatingCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNo
Technology FamilyACACACAC
VCC(Max), V5.55.55.55.5
VCC(Min), V1.51.51.51.5
Voltage(Nom), V1.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,5
tpd @ Nom Voltage(Max), ns154,17.2,12.3154,17.2,12.3154,17.2,12.3154,17.2,12.3

Eco Plan

CD74AC174ECD74AC174MCD74AC174M96CD74AC174M96E4
RoHSCompliantCompliantCompliantCompliant
Pb FreeYes

Application Notes

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop