Datasheet Texas Instruments CD74AC373

Manufacturer	Texas Instruments
Series	CD74AC373

Octal Transparent Latches with 3-State Outputs

Datasheets

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PDF, 1.3 Mb, File published: Dec 3, 1998

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Data sheet acquired from Harris Semiconductor
SCHS289 This data sheet is applicable to the CD54/74AC373, CD54/74ACT373, and CD54ACT533. The CD74AC533 and CD74ACT533 were not
acquired from Harris Semiconductor. PACKAGE OPTION ADDENDUM www.ti.com 17-Mar-2017 PACKAGING INFORMATION
Orderable Device Status
(1) Package Type Package Pins Package
Drawing
Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (В°C) Device Marking
(4/5) CD54AC373F3A ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 CD54AC373F3A CD54ACT373F3A ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 CD54ACT373F3A CD74AC373E ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -55 to 125 CD74AC373E CD74AC373M ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC373M CD74AC373M96 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC373M CD74AC373MG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC373M CD74ACT373E ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -55 to 125 CD74ACT373E CD74ACT373EE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -55 to 125 CD74ACT373E CD74ACT373M ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 ACT373M CD74ACT373M96 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 ACT373M CD74ACT373M96E4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 ACT373M CD74ACT373MG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 ACT373M (1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device. …

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Status

	CD74AC373E	CD74AC373M	CD74AC373M96	CD74AC373MG4
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	No	No	No	No

Packaging

	CD74AC373E	CD74AC373M	CD74AC373M96	CD74AC373MG4
N	1	2	3	4
Pin	20	20	20	20
Package Type	N	DW	DW	DW
Industry STD Term	PDIP	SOIC	SOIC	SOIC
JEDEC Code	R-PDIP-T	R-PDSO-G	R-PDSO-G	R-PDSO-G
Package QTY	20	25	2000	25
Carrier	TUBE	TUBE	LARGE T&R	TUBE
Device Marking	CD74AC373E	AC373M	AC373M	AC373M
Width (mm)	6.35	7.5	7.5	7.5
Length (mm)	24.33	12.8	12.8	12.8
Thickness (mm)	4.57	2.35	2.35	2.35
Pitch (mm)	2.54	1.27	1.27	1.27
Max Height (mm)	5.08	2.65	2.65	2.65
Mechanical Data	Download	Download	Download	Download

Parametrics

Parameters / Models	CD74AC373E	CD74AC373M	CD74AC373M96	CD74AC373MG4
3-State Output	Yes	Yes	Yes	Yes
Bits	8	8	8	8
F @ Nom Voltage(Max), Mhz	100	100	100	100
ICC @ Nom Voltage(Max), mA	0.08	0.08	0.08	0.08
Operating Temperature Range, C	-55 to 125	-55 to 125	-55 to 125	-55 to 125
Output Drive (IOL/IOH)(Max), mA	24/-24	24/-24	24/-24	24/-24
Package Group	PDIP	SOIC	SOIC	SOIC
Package Size: mm2:W x L, PKG	See datasheet (PDIP)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)
Rating	Catalog	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No	No
Technology Family	AC	AC	AC	AC
VCC(Max), V	5.5	5.5	5.5	5.5
VCC(Min), V	1.5	1.5	1.5	1.5
Voltage(Nom), V	1.5,3.3,5	1.5,3.3,5	1.5,3.3,5	1.5,3.3,5
tpd @ Nom Voltage(Max), ns	96,10.8,7.7	96,10.8,7.7	96,10.8,7.7	96,10.8,7.7

Eco Plan

	CD74AC373E	CD74AC373M	CD74AC373M96	CD74AC373MG4
RoHS	Compliant	Compliant	Compliant	Compliant
Pb Free	Yes

Application Notes

Download
Power-Up Behavior of Clocked Devices (Rev. A)
PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
Download
Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
PDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Model Line

Series: CD74AC373 (4)

CD74AC373E CD74AC373M CD74AC373M96 CD74AC373MG4

Manufacturer's Classification

Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Latch