Datasheet Texas Instruments CD74HCT259

ManufacturerTexas Instruments
SeriesCD74HCT259
Datasheet Texas Instruments CD74HCT259

High Speed CMOS Logic 8-Bit Addressable Latch

Datasheets

CD54HC259, CD74HC259, CD54HCT259, CD74HCT259 datasheet
PDF, 461 Kb, Revision: C, File published: Oct 16, 2003
Extract from the document

Prices

Status

CD74HCT259ECD74HCT259EE4CD74HCT259MCD74HCT259M96CD74HCT259M96E4CD74HCT259M96G4CD74HCT259MG4CD74HCT259MT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNo

Packaging

CD74HCT259ECD74HCT259EE4CD74HCT259MCD74HCT259M96CD74HCT259M96E4CD74HCT259M96G4CD74HCT259MG4CD74HCT259MT
N12345678
Pin1616161616161616
Package TypeNNDDDDDD
Industry STD TermPDIPPDIPSOICSOICSOICSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2525402500250040250
CarrierTUBETUBETUBELARGE T&RLARGE T&RTUBESMALL T&R
Device MarkingCD74HCT259ECD74HCT259EHCT259MHCT259MHCT259MHCT259MHCT259M
Width (mm)6.356.353.913.913.913.913.913.91
Length (mm)19.319.39.99.99.99.99.99.9
Thickness (mm)3.93.91.581.581.581.581.581.58
Pitch (mm)2.542.541.271.271.271.271.271.27
Max Height (mm)5.085.081.751.751.751.751.751.75
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsCD74HCT259E
CD74HCT259E
CD74HCT259EE4
CD74HCT259EE4
CD74HCT259M
CD74HCT259M
CD74HCT259M96
CD74HCT259M96
CD74HCT259M96E4
CD74HCT259M96E4
CD74HCT259M96G4
CD74HCT259M96G4
CD74HCT259MG4
CD74HCT259MG4
CD74HCT259MT
CD74HCT259MT
3-State OutputNoNoNoNoNoNoNoNo
Approx. Price (US$)0.17 | 1ku
Bits8888888
Bits(#)8
F @ Nom Voltage(Max), Mhz25252525252525
F @ Nom Voltage(Max)(Mhz)25
ICC @ Nom Voltage(Max), mA0.080.080.080.080.080.080.08
ICC @ Nom Voltage(Max)(mA)0.08
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Operating Temperature Range(C)-55 to 125
Output Drive (IOL/IOH)(Max), mA4/-44/-44/-44/-44/-44/-44/-4
Output Drive (IOL/IOH)(Max)(mA)4/-4
Package GroupPDIPPDIPSOICSOICSOICSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNo
Technology FamilyHCTHCTHCTHCTHCTHCTHCTHCT
VCC(Max), V5.55.55.55.55.55.55.5
VCC(Max)(V)5.5
VCC(Min), V4.54.54.54.54.54.54.5
VCC(Min)(V)4.5
Voltage(Nom), V5555555
Voltage(Nom)(V)5
tpd @ Nom Voltage(Max), ns49494949494949
tpd @ Nom Voltage(Max)(ns)49

Eco Plan

CD74HCT259ECD74HCT259EE4CD74HCT259MCD74HCT259M96CD74HCT259M96E4CD74HCT259M96G4CD74HCT259MG4CD74HCT259MT
RoHSCompliantCompliantCompliantCompliantCompliantNot CompliantCompliantCompliant
Pb FreeYesYesNo

Application Notes

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, File published: Feb 6, 2015

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Flip-Flop/Latch/Register> Other Latch