Datasheet Texas Instruments CD74HCT74
Manufacturer | Texas Instruments |
Series | CD74HCT74 |
High Speed CMOS Logic Dual Positive-Edge-Triggered D Flip-Flops with Set and Reset
Datasheets
CD54HC74, CD74HC74, CD54HCT74, CD74HCT74 datasheet
PDF, 727 Kb, Revision: D, File published: Aug 21, 2003
Extract from the document
Prices
Status
CD74HCT74E | CD74HCT74M | CD74HCT74M96 | CD74HCT74M96G4 | CD74HCT74ME4 | CD74HCT74MT | CD74HCT74MTE4 | |
---|---|---|---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No | No | No | No | No | No |
Packaging
CD74HCT74E | CD74HCT74M | CD74HCT74M96 | CD74HCT74M96G4 | CD74HCT74ME4 | CD74HCT74MT | CD74HCT74MTE4 | |
---|---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
Pin | 14 | 14 | 14 | 14 | 14 | 14 | 14 |
Package Type | N | D | D | D | D | D | D |
Industry STD Term | PDIP | SOIC | SOIC | SOIC | SOIC | SOIC | SOIC |
JEDEC Code | R-PDIP-T | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
Package QTY | 25 | 50 | 2500 | 2500 | 50 | 250 | 250 |
Carrier | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE | SMALL T&R | SMALL T&R |
Device Marking | CD74HCT74E | HCT74M | HCT74M | HCT74M | HCT74M | HCT74M | HCT74M |
Width (mm) | 6.35 | 3.91 | 3.91 | 3.91 | 3.91 | 3.91 | 3.91 |
Length (mm) | 19.3 | 8.65 | 8.65 | 8.65 | 8.65 | 8.65 | 8.65 |
Thickness (mm) | 3.9 | 1.58 | 1.58 | 1.58 | 1.58 | 1.58 | 1.58 |
Pitch (mm) | 2.54 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 |
Max Height (mm) | 5.08 | 1.75 | 1.75 | 1.75 | 1.75 | 1.75 | 1.75 |
Mechanical Data | Download | Download | Download | Download | Download | Download | Download |
Parametrics
Parameters / Models | CD74HCT74E | CD74HCT74M | CD74HCT74M96 | CD74HCT74M96G4 | CD74HCT74ME4 | CD74HCT74MT | CD74HCT74MTE4 |
---|---|---|---|---|---|---|---|
3-State Output | No | No | No | No | No | No | No |
Bits | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
F @ Nom Voltage(Max), Mhz | 25 | 25 | 25 | 25 | 25 | 25 | 25 |
ICC @ Nom Voltage(Max), mA | 0.04 | 0.04 | 0.04 | 0.04 | 0.04 | 0.04 | 0.04 |
Operating Temperature Range, C | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 |
Output Drive (IOL/IOH)(Max), mA | 4/-4 | 4/-4 | 4/-4 | 4/-4 | 4/-4 | 4/-4 | 4/-4 |
Package Group | PDIP | SOIC | SOIC | SOIC | SOIC | SOIC | SOIC |
Package Size: mm2:W x L, PKG | See datasheet (PDIP) | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | 14SOIC: 52 mm2: 6 x 8.65(SOIC) |
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
Schmitt Trigger | No | No | No | No | No | No | No |
Technology Family | HCT | HCT | HCT | HCT | HCT | HCT | HCT |
VCC(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
VCC(Min), V | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 |
Voltage(Nom), V | 5 | 5 | 5 | 5 | 5 | 5 | 5 |
tpd @ Nom Voltage(Max), ns | 44 | 44 | 44 | 44 | 44 | 44 | 44 |
Eco Plan
CD74HCT74E | CD74HCT74M | CD74HCT74M96 | CD74HCT74M96G4 | CD74HCT74ME4 | CD74HCT74MT | CD74HCT74MTE4 | |
---|---|---|---|---|---|---|---|
RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Pb Free | Yes |
Application Notes
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
Model Line
Series: CD74HCT74 (7)
Manufacturer's Classification
- Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop