Datasheet Texas Instruments CDCLVC1102

ManufacturerTexas Instruments
SeriesCDCLVC1102
Datasheet Texas Instruments CDCLVC1102

Low Jitter, 1:2 LVCMOS Fan-out Clock Buffer

Datasheets

CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family datasheet
PDF, 1.6 Mb, Revision: B, File published: Feb 24, 2017
Extract from the document

Prices

Status

CDCLVC1102PWCDCLVC1102PWR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYes

Packaging

CDCLVC1102PWCDCLVC1102PWR
N12
Pin88
Package TypePWPW
Industry STD TermTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY1502000
CarrierTUBELARGE T&R
Device MarkingC9C2C9C2
Width (mm)4.44.4
Length (mm)33
Thickness (mm)11
Pitch (mm).65.65
Max Height (mm)1.21.2
Mechanical DataDownloadDownload

Parametrics

Parameters / ModelsCDCLVC1102PW
CDCLVC1102PW
CDCLVC1102PWR
CDCLVC1102PWR
Additive RMS Jitter(Typ), fs7070
Input Frequency(Max), MHz250250
Input LevelLVCMOSLVCMOS
Number of Outputs22
Operating Temperature Range, C-40 to 85-40 to 85
Output Frequency(Max), MHz250250
Output LevelLVCMOSLVCMOS
Package GroupTSSOPTSSOP
Package Size: mm2:W x L, PKG8TSSOP: 19 mm2: 6.4 x 3(TSSOP)8TSSOP: 19 mm2: 6.4 x 3(TSSOP)
RatingCatalogCatalog
VCC Out, V2.5,3.32.5,3.3

Eco Plan

CDCLVC1102PWCDCLVC1102PWR
RoHSCompliantCompliant

Application Notes

  • How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock Buffer
    PDF, 518 Kb, File published: Nov 30, 2010
    The CDCLVC11xx buffer family from Texas Instruments has a nominal voltage supply of 2.5 V and 3.3 V. With the simple employment of an external RC network, this family of devices can handle incoming signals whose voltage levels go up to 1.8 V. This application report explains how to implement this network and dimension its discrete components, without impacting the specifications of additive ji

Model Line

Series: CDCLVC1102 (2)

Manufacturer's Classification

  • Semiconductors> Clock and Timing> Clock Buffers> Single-Ended