Datasheet Texas Instruments CDCLVC1110PWR
| Manufacturer | Texas Instruments |
| Series | CDCLVC1110 |
| Part Number | CDCLVC1110PWR |
Low Jitter, 1:10 LVCMOS Fan-out Clock Buffer 20-TSSOP -40 to 85
Datasheets
CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family datasheet
PDF, 1.6 Mb, Revision: B, File published: Feb 24, 2017
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Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| Pin | 20 |
| Package Type | PW |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | C9CA |
| Width (mm) | 4.4 |
| Length (mm) | 6.5 |
| Thickness (mm) | 1 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Download |
Parametrics
| Additive RMS Jitter(Typ) | 70 fs |
| Input Frequency(Max) | 250 MHz |
| Input Level | LVCMOS |
| Number of Outputs | 10 |
| Operating Temperature Range | -40 to 85 C |
| Output Frequency(Max) | 250 MHz |
| Output Level | LVCMOS |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) PKG |
| Rating | Catalog |
| VCC Out | 2.5,3.3 V |
Eco Plan
| RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: CDCLVC1112EVM
CDCLVC1112 Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock BufferPDF, 518 Kb, File published: Nov 30, 2010
The CDCLVC11xx buffer family from Texas Instruments has a nominal voltage supply of 2.5 V and 3.3 V. With the simple employment of an external RC network, this family of devices can handle incoming signals whose voltage levels go up to 1.8 V. This application report explains how to implement this network and dimension its discrete components, without impacting the specifications of additive ji
Model Line
Series: CDCLVC1110 (2)
- CDCLVC1110PW CDCLVC1110PWR
Manufacturer's Classification
- Semiconductors > Clock and Timing > Clock Buffers > Single-Ended
