Datasheet Texas Instruments CDCLVD110A

ManufacturerTexas Instruments
SeriesCDCLVD110A
Datasheet Texas Instruments CDCLVD110A

1-to-10 LVDS Clock Buffer up to 1100MHz with Minimum Skew for Clock Distribution

Datasheets

CDCLVD110A Programmable Low-Voltage 1:10 LVDS Clock Driver datasheet
PDF, 1.1 Mb, Revision: D, File published: Dec 12, 2016
Extract from the document

Prices

Status

CDCLVD110ARHBRCDCLVD110ARHBRG4CDCLVD110ARHBTCDCLVD110ARHBTG4CDCLVD110AVFCDCLVD110AVFG4CDCLVD110AVFRCDCLVD110AVFRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoNoYesNoYesYesNo

Packaging

CDCLVD110ARHBRCDCLVD110ARHBRG4CDCLVD110ARHBTCDCLVD110ARHBTG4CDCLVD110AVFCDCLVD110AVFG4CDCLVD110AVFRCDCLVD110AVFRG4
N12345678
Pin3232323232323232
Package TypeRHBRHBRHBRHBVFVFVFVF
Industry STD TermVQFNVQFNVQFNVQFNLQFPLQFPLQFPLQFP
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-NS-PQFP-NS-PQFP-GS-PQFP-GS-PQFP-GS-PQFP-G
Package QTY3000300025025025025010001000
CarrierLARGE T&RLARGE T&RSMALL T&RSMALL T&RJEDEC TRAY (10+1)JEDEC TRAY (10+1)LARGE T&RLARGE T&R
Device MarkingLVD110ALVD110ALVD110ALVD110ACKLVD110ACKLVD110ACKLVD110ACKLVD110A
Width (mm)55557777
Length (mm)55557777
Thickness (mm).9.9.9.91.41.41.41.4
Pitch (mm).5.5.5.5.8.8.8.8
Max Height (mm)11111.61.61.61.6
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsCDCLVD110ARHBR
CDCLVD110ARHBR
CDCLVD110ARHBRG4
CDCLVD110ARHBRG4
CDCLVD110ARHBT
CDCLVD110ARHBT
CDCLVD110ARHBTG4
CDCLVD110ARHBTG4
CDCLVD110AVF
CDCLVD110AVF
CDCLVD110AVFG4
CDCLVD110AVFG4
CDCLVD110AVFR
CDCLVD110AVFR
CDCLVD110AVFRG4
CDCLVD110AVFRG4
Additive RMS Jitter(Typ), fs111111111111111111111111
Input Frequency(Max), MHz11001100110011001100110011001100
Input LevelLVDSLVDSLVDSLVDSLVDSLVDSLVDSLVDS
Number of Outputs1010101010101010
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Frequency(Max), MHz11001100110011001100110011001100
Output LevelLVDSLVDSLVDSLVDSLVDSLVDSLVDSLVDS
Package GroupVQFNVQFNVQFNVQFNLQFPLQFPLQFPLQFP
Package Size: mm2:W x L, PKG32VQFN: 25 mm2: 5 x 5(VQFN)32VQFN: 25 mm2: 5 x 5(VQFN)32VQFN: 25 mm2: 5 x 5(VQFN)32VQFN: 25 mm2: 5 x 5(VQFN)32LQFP: 81 mm2: 9 x 9(LQFP)32LQFP: 81 mm2: 9 x 9(LQFP)32LQFP: 81 mm2: 9 x 9(LQFP)32LQFP: 81 mm2: 9 x 9(LQFP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
VCC, V2.52.52.52.52.52.52.52.5
VCC Out, V2.52.52.52.52.52.52.52.5

Eco Plan

CDCLVD110ARHBRCDCLVD110ARHBRG4CDCLVD110ARHBTCDCLVD110ARHBTG4CDCLVD110AVFCDCLVD110AVFG4CDCLVD110AVFRCDCLVD110AVFRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Model Line

Manufacturer's Classification

  • Semiconductors> Clock and Timing> Clock Buffers> Differential