Datasheet Texas Instruments CDCLVD2104

ManufacturerTexas Instruments
SeriesCDCLVD2104
Datasheet Texas Instruments CDCLVD2104

Low Jitter, Dual 1:4 Universal-to-LVDS Buffer

Datasheets

Dual 1:4 Low Additive Jitter LVDS Buffer datasheet
PDF, 937 Kb, Revision: A, File published: Aug 31, 2010
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Prices

Status

CDCLVD2104RHDRCDCLVD2104RHDT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNo

Packaging

CDCLVD2104RHDRCDCLVD2104RHDT
N12
Pin2828
Package TypeRHDRHD
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY3000250
CarrierLARGE T&RSMALL T&R
Device MarkingCDCLVD2104
Width (mm)55
Length (mm)55
Thickness (mm).9.9
Pitch (mm).5.5
Max Height (mm)11
Mechanical DataDownloadDownload

Parametrics

Parameters / ModelsCDCLVD2104RHDR
CDCLVD2104RHDR
CDCLVD2104RHDT
CDCLVD2104RHDT
Additive RMS Jitter(Typ), fs171171
Input Frequency(Max), MHz800800
Input LevelLVCMOS,LVDS,LVPECLLVCMOS,LVDS,LVPECL
Number of Outputs88
Operating Temperature Range, C-40 to 85-40 to 85
Output Frequency(Max), MHz800800
Output LevelLVDSLVDS
Package GroupVQFNVQFN
Package Size: mm2:W x L, PKG28VQFN: 25 mm2: 5 x 5(VQFN)28VQFN: 25 mm2: 5 x 5(VQFN)
RatingCatalogCatalog
VCC, V2.52.5
VCC Out, V2.52.5

Eco Plan

CDCLVD2104RHDRCDCLVD2104RHDT
RoHSCompliantCompliant

Model Line

Series: CDCLVD2104 (2)

Manufacturer's Classification

  • Semiconductors> Clock and Timing> Clock Buffers> Differential