Datasheet Texas Instruments CDCLVD2106

ManufacturerTexas Instruments
SeriesCDCLVD2106
Datasheet Texas Instruments CDCLVD2106

Low Jitter, Dual 1:6 Universal-to-LVDS Buffer

Datasheets

Dual 1:6 Low Additive Jitter LVDS Buffer datasheet
PDF, 912 Kb, Revision: B, File published: Jan 17, 2011
Extract from the document

Prices

Status

CDCLVD2106RHARCDCLVD2106RHAT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYes

Packaging

CDCLVD2106RHARCDCLVD2106RHAT
N12
Pin4040
Package TypeRHARHA
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY2500250
CarrierLARGE T&RSMALL T&R
Device MarkingCDCLVDCDCLVD
Width (mm)66
Length (mm)66
Thickness (mm).9.9
Pitch (mm).5.5
Max Height (mm)11
Mechanical DataDownloadDownload

Parametrics

Parameters / ModelsCDCLVD2106RHAR
CDCLVD2106RHAR
CDCLVD2106RHAT
CDCLVD2106RHAT
Additive RMS Jitter(Typ), fs171171
Input Frequency(Max), MHz800800
Input LevelLVCMOS,LVDS,LVPECLLVCMOS,LVDS,LVPECL
Number of Outputs1212
Operating Temperature Range, C-40 to 85-40 to 85
Output Frequency(Max), MHz800800
Output LevelLVDSLVDS
Package GroupVQFNVQFN
Package Size: mm2:W x L, PKG40VQFN: 36 mm2: 6 x 6(VQFN)40VQFN: 36 mm2: 6 x 6(VQFN)
RatingCatalogCatalog
VCC, V2.52.5
VCC Out, V2.52.5

Eco Plan

CDCLVD2106RHARCDCLVD2106RHAT
RoHSCompliantCompliant

Model Line

Series: CDCLVD2106 (2)

Manufacturer's Classification

  • Semiconductors> Clock and Timing> Clock Buffers> Differential