Datasheet Texas Instruments CDCM61001
| Manufacturer | Texas Instruments |
| Series | CDCM61001 |
1:1 Ultra Low Jitter Crystal-In Clock Generator
Datasheets
One Output, Integrated VCO, Low-Jitter Clock Generator.. datasheet
PDF, 948 Kb, Revision: F, File published: Jun 2, 2011
Extract from the document
Prices
Status
| CDCM61001RHBR | CDCM61001RHBR/2801 | CDCM61001RHBT | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes | No |
Packaging
| CDCM61001RHBR | CDCM61001RHBR/2801 | CDCM61001RHBT | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 32 | 32 | 32 |
| Package Type | RHB | RHB | RHB |
| Industry STD Term | VQFN | VQFN | VQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N |
| Package QTY | 3000 | 3000 | 250 |
| Carrier | LARGE T&R | LARGE T&R | SMALL T&R |
| Device Marking | 61001 | 61001 | CDCM |
| Width (mm) | 5 | 5 | 5 |
| Length (mm) | 5 | 5 | 5 |
| Thickness (mm) | .9 | .9 | .9 |
| Pitch (mm) | .5 | .5 | .5 |
| Max Height (mm) | 1 | 1 | 1 |
| Mechanical Data | Download | Download | Download |
Parametrics
| Parameters / Models | CDCM61001RHBR | CDCM61001RHBR/2801 | CDCM61001RHBT |
|---|---|---|---|
| Input Level | Crystal,LVCMOS | Crystal,LVCMOS | Crystal,LVCMOS |
| Number of Outputs | 1 | 1 | 1 |
| Output Frequency(Max), MHz | 683.28 | 683.28 | 683.28 |
| Output Frequency(Min), MHz | 43.75 | 43.75 | 43.75 |
| Output Level | LVPECL,LVDS,LVCMOS | LVPECL,LVDS,LVCMOS | LVPECL,LVDS,LVCMOS |
| Package Group | VQFN | VQFN | VQFN |
| Package Size: mm2:W x L, PKG | 32VQFN: 25 mm2: 5 x 5(VQFN) | 32VQFN: 25 mm2: 5 x 5(VQFN) | 32VQFN: 25 mm2: 5 x 5(VQFN) |
| Programmability | Pin configuration | Pin configuration | Pin configuration |
| Special Features | Pin Programming | Pin Programming | Pin Programming |
| VCC Core, V | 3.3 | 3.3 | 3.3 |
| VCC Out, V | 3.3 | 3.3 | 3.3 |
Eco Plan
| CDCM61001RHBR | CDCM61001RHBR/2801 | CDCM61001RHBT | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
Application Notes
- Fibre Channel and SAN Clock Generation Using the CDCM6100xPDF, 322 Kb, File published: Feb 18, 2009
This application report is a guide for using Texas Instruments CDCM6100x in a Fibre Channel application as a clock distributor and clock synthesizer along with measured jitter performance results. - Using LVCMOS Input to the CDCM6100xPDF, 66 Kb, File published: May 23, 2010
This application report is a general guide for using LVCMOS inputs to the CDCM6100x series of ultra-low jitter clock generators from Texas Instruments. This document explains the basic connectivity of LVCMOS inputs to the CDCM6100x and recommends several methods for using the device that ensure proper operation. - Ethernet Clock Generation Using the CDCM6100xPDF, 454 Kb, File published: Feb 18, 2009
This application report is a guide for using Texas Instruments CDCM6100x in an Ethernet LAN and WAN application as a clock distributor and clock synthesizer along with measured jitter performance results. - TI Powers Altera's Arria II GX FPGA Development KitPDF, 596 Kb, File published: Sep 29, 2009
Model Line
Series: CDCM61001 (3)
Manufacturer's Classification
- Semiconductors> Clock and Timing> Clock Generators> General Purpose
