Datasheet Texas Instruments CDCM6208
Manufacturer | Texas Instruments |
Series | CDCM6208 |
2:8 Ultra Low Power, Low Jitter Clock Generator
Datasheets
2:8 Clock Generator, Jitter Cleaner With Fractional Dividers datasheet
PDF, 2.9 Mb, Revision: F, File published: Apr 10, 2014
Extract from the document
Prices
Status
CDCM6208V1RGZR | CDCM6208V1RGZT | CDCM6208V2RGZR | CDCM6208V2RGZT | |
---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | Yes | No | Yes |
Packaging
CDCM6208V1RGZR | CDCM6208V1RGZT | CDCM6208V2RGZR | CDCM6208V2RGZT | |
---|---|---|---|---|
N | 1 | 2 | 3 | 4 |
Pin | 48 | 48 | 48 | 48 |
Package Type | RGZ | RGZ | RGZ | RGZ |
Industry STD Term | VQFN | VQFN | VQFN | VQFN |
JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PQFP-N |
Package QTY | 2500 | 250 | 2500 | 250 |
Carrier | LARGE T&R | SMALL T&R | LARGE T&R | SMALL T&R |
Device Marking | CDCM6208V1 | CDCM6208V1 | CDCM6208V2 | CDCM6208V2 |
Width (mm) | 7 | 7 | 7 | 7 |
Length (mm) | 7 | 7 | 7 | 7 |
Thickness (mm) | .9 | .9 | .9 | .9 |
Pitch (mm) | .5 | .5 | .5 | .5 |
Max Height (mm) | 1 | 1 | 1 | 1 |
Mechanical Data | Download | Download | Download | Download |
Parametrics
Parameters / Models | CDCM6208V1RGZR | CDCM6208V1RGZT | CDCM6208V2RGZR | CDCM6208V2RGZT |
---|---|---|---|---|
Input Level | CML,LVCMOS,LVDS,LVPECL,XTAL | CML,LVCMOS,LVDS,LVPECL,XTAL | CML,LVCMOS,LVDS,LVPECL,XTAL | CML,LVCMOS,LVDS,LVPECL,XTAL |
Number of Outputs | 8 | 8 | 8 | 8 |
Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
Output Frequency(Max), MHz | 800 | 800 | 800 | 800 |
Output Level | CML,HCSL,LVCMOS,LVDS,LVPECL | CML,HCSL,LVCMOS,LVDS,LVPECL | CML,HCSL,LVCMOS,LVDS,LVPECL | CML,HCSL,LVCMOS,LVDS,LVPECL |
Package Group | VQFN | VQFN | VQFN | VQFN |
Package Size: mm2:W x L, PKG | 48VQFN: 49 mm2: 7 x 7(VQFN) | 48VQFN: 49 mm2: 7 x 7(VQFN) | 48VQFN: 49 mm2: 7 x 7(VQFN) | 48VQFN: 49 mm2: 7 x 7(VQFN) |
Programmability | I2C,Pin configuration,SPI | I2C,Pin configuration,SPI | I2C,Pin configuration,SPI | I2C,Pin configuration,SPI |
VCC Core, V | 3.3,2.5,1.8 | 3.3,2.5,1.8 | 3.3,2.5,1.8 | 3.3,2.5,1.8 |
VCC Out, V | 3.3,2.5,1.8 | 3.3,2.5,1.8 | 3.3,2.5,1.8 | 3.3,2.5,1.8 |
Eco Plan
CDCM6208V1RGZR | CDCM6208V1RGZT | CDCM6208V2RGZR | CDCM6208V2RGZT | |
---|---|---|---|---|
RoHS | Compliant | Compliant | Compliant | Compliant |
Application Notes
- A Step by Step Guide on Using the MSP430 as a Bootloader for the CDCM6208VxEVM (Rev. A)PDF, 612 Kb, Revision: A, File published: Dec 4, 2012
- Driving the TLK10002 10Gpbs SERDES with the CDCM6208 Clock GeneratorPDF, 1.2 Mb, File published: Dec 14, 2012
- How to measure Total Jitter (TJ) (Rev. B)PDF, 6.2 Mb, Revision: B, File published: Aug 8, 2017
Today,the jitterspecification,TJ, is usedin moreandmoresystems,at the sametimethe jitterrequirementsget lowerand lower.Clockgeneratorsor jittercleanerslike the CDCM6208meetthosetoughjitterspecificationsfor mostsystems(for example,TMS320TCI66xxDSP-basedsystems;seeHardwareDesignGuidefor KeyStoneI Devices(SPRABI2).Theothers - Crystal or Crystal Oscillator Replacement with Silicon DevicesPDF, 894 Kb, File published: Jun 18, 2014
This application report is a general guide that outlines the advantages of using silicon-based timingdevices from Texas Instruments to generate system clocking solutions. This report covers theconventional way to derive system clocks using crystals and crystal oscillators, disadvantages of usingthese mechanical components, and details on replacing them with silicon-based timing devices from
Model Line
Series: CDCM6208 (4)
Manufacturer's Classification
- Semiconductors> Clock and Timing> Clock Generators> Ultra-Low Jitter <300fsec-RMS