Datasheet Texas Instruments CY29FCT818T

ManufacturerTexas Instruments
SeriesCY29FCT818T

Diagnostic Scan Register

Datasheets

Diagnostic Scan Register With 3-State Outputs datasheet
PDF, 527 Kb, Revision: B, File published: Nov 2, 2001
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Prices

Status

CY29FCT818CTSOCT
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

CY29FCT818CTSOCT
N1
Pin24
Package TypeDW
Industry STD TermSOIC
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device Marking29FCT818C
Width (mm)7.5
Length (mm)15.4
Thickness (mm)2.35
Pitch (mm)1.27
Max Height (mm)2.65
Mechanical DataDownload

Eco Plan

CY29FCT818CTSOCT
RoHSCompliant

Application Notes

  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, Revision: C, File published: Dec 2, 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, File published: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, Revision: A, File published: Jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati

Model Line

Series: CY29FCT818T (1)

Manufacturer's Classification

  • Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers