Datasheet Texas Instruments DAC101S101-Q1
| Manufacturer | Texas Instruments |
| Series | DAC101S101-Q1 |
10-Bit Micro Power, RRO Digital-to-Analog Converter
Datasheets
DAC101S101 and DAC101S101Q-1 10-Bit Micro Power, RRO Digital-to-Analog Converter datasheet
PDF, 1.6 Mb, Revision: G, File published: Apr 28, 2016
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Status
| DAC101S101QCMK/NOPB | DAC101S101QCMKX/NOPB | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | Yes |
Packaging
| DAC101S101QCMK/NOPB | DAC101S101QCMKX/NOPB | |
|---|---|---|
| N | 1 | 2 |
| Pin | 6 | 6 |
| Package Type | DDC | DDC |
| Industry STD Term | SOT-23-THIN | SOT-23-THIN |
| JEDEC Code | R-PDSO-G | R-PDSO-G |
| Package QTY | 1000 | 3000 |
| Carrier | LARGE T&R | LARGE T&R |
| Device Marking | X63Q | X63Q |
| Width (mm) | 1.6 | 1.6 |
| Length (mm) | 2.9 | 2.9 |
| Thickness (mm) | .87 | .87 |
| Pitch (mm) | .95 | .95 |
| Max Height (mm) | 1.1 | 1.1 |
| Mechanical Data | Download | Download |
Parametrics
| Parameters / Models | DAC101S101QCMK/NOPB | DAC101S101QCMKX/NOPB |
|---|---|---|
| Code to Code Glitch(Typ), nV-sec | 12 | 12 |
| DAC Architecture | String | String |
| DAC Channels | 1 | 1 |
| Gain Error(Max), %FSR | 1 | 1 |
| INL(Max), +/-LSB | 2.8 | 2.8 |
| Interface | SPI | SPI |
| Operating Temperature Range, C | -40 to 125 | -40 to 125 |
| Output Range Max., mA/V | 5.5 | 5.5 |
| Output Type | Buffered Voltage | Buffered Voltage |
| Package Group | SOT-23-THIN | SOT-23-THIN |
| Package Size: mm2:W x L, PKG | 6SOT-23-THIN: 8 mm2: 2.8 x 2.9(SOT-23-THIN) | 6SOT-23-THIN: 8 mm2: 2.8 x 2.9(SOT-23-THIN) |
| Power Consumption(Typ), mW | 0.63 | 0.63 |
| Rating | Automotive | Automotive |
| Reference: Type | Ext | Ext |
| Resolution, Bits | 10 | 10 |
| Sample / Update Rate, MSPS | 1.8 | 1.8 |
| Settling Time, µs | 8 | 8 |
| Special Features | N/A | N/A |
| Zero Code Error(Typ), mV | 15 | 15 |
Eco Plan
| DAC101S101QCMK/NOPB | DAC101S101QCMKX/NOPB | |
|---|---|---|
| RoHS | Compliant | Compliant |
Application Notes
- AN-2001 Daisy Chaining Precision DACs (Rev. A)PDF, 75 Kb, Revision: A, File published: May 1, 2013
It is not uncommon for the system designer to face a quagmire of reconciling the system complexity withthe desire to keep the system footprint small. One specific example that often arises in the context ofsmall system footprint is the need for single master controller to communicate with a number of slavedevices. This is not much of a problem if the master controller has multiple I/O resour
Model Line
Series: DAC101S101-Q1 (2)
Manufacturer's Classification
- Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> Precision DACs (=<10MSPS)
