Datasheet Texas Instruments DP83848LFQSQ

Manufacturer	Texas Instruments
Series	DP83848LFQ
Part Number	DP83848LFQSQ

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Application Notes

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  AN-976 Multiple Function Interface Design Challenges
  PDF, 158 Kb, File published: May 3, 2004
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  AN-1519 DP83848 PHYTERВ® Transformerless Ethernet Operation (Rev. A)
  PDF, 249 Kb, Revision: A, File published: Apr 26, 2013
  This application report describes a method for using Texas Instruments PHYTERв„ў products withouttransformer magnetics. This includes a list of recommendations for configuring transformerless systems. Adescription of a typical network configuration is provided, followed by descriptions of non-typicaltransformerless configurations. Finally, this application note presents PHYTER product pe
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  AN-1499 DP83846 to DP83848C/I/YB PHYTER System Rollover Document (Rev. B)
  PDF, 178 Kb, Revision: B, File published: Apr 26, 2013
  This is an informational document detailing points to be considered when updating an existing 10/100Mb/s Ethernet design, using Texas Instruments DP83846 Ethernet Physical Layer (PHY) product, to thenew DP83848C/I/YB PHYTER product. Although the basic functions of the device are similar, differencesinclude feature set, pin functions, package and pinout, and possibly register operation. The i
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  DP83848 - Single 10/100 Mb/s Ethernet Transceiver Energy Detect Mode (Rev. A)
  PDF, 38 Kb, Revision: A, File published: Apr 26, 2013
  This application report explains the concept and the operation of the Energy Detect mode of the DP83848.
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  DP83848 - Single 10/100 Mb/s Ethernet Transceiver Ini During Pwr Dwn Mode (Rev. A)
  PDF, 41 Kb, Revision: A, File published: Apr 26, 2013
  This application report details the procedure to put the device into Power Down mode during initialization,configure the registers of the device to the desired mode, and then exit Power Down.
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  DP83848 Sin 10/100Mb/s Ethernet Transcvr Reduced Media Indep Interfce RMII Mode (Rev. A)
  PDF, 168 Kb, Revision: A, File published: Apr 26, 2013
  This application report summarizes how a designer can take advantage of RMII mode of the DP83848 toprovide lower cost system design.
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  Improving Electro-Magnetic Noise Immunity in Serial Communications Systems (Rev. A)
  PDF, 60 Kb, Revision: A, File published: Apr 26, 2013
  This application note provides key recommendations for implementing serial communication systems that exceed IEC immunity test standards. To provide an example of highly reliable serial communications system implementation and testing, a Texas Instruments DP83640 Ethernet Physical Layer device was tested for International Electrotechnical Commission (IEC) immunity test compliance. Results from the
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  AN-1511 Cable Discharge Event (Rev. A)
  PDF, 262 Kb, Revision: A, File published: Apr 26, 2013
  This application report discusses exposing semiconductor devices to potentially destructive Electro StaticDischarge (ESD).
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  Diff Between NSC 10/100 Mb/s Ethernet Physical Layer Devices (Rev. A)
  PDF, 116 Kb, Revision: A, File published: Apr 26, 2013
  This application report discusses the differences between the 10/100 Mb/s Ethernet Physical Layerdevices, DP8384x.
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  AN-1507 DP83848 and DP83849 100Mb Data Latency (Rev. B)
  PDF, 301 Kb, Revision: B, File published: Apr 26, 2013
  The purpose of this document is to define the 100Mb Transmit and Receive latencies of the TexasInstruments Semiconductor DP83848 and DP83849 Ethernet Transceiver family, and to document theircontributions for end-to-end packet transfer in both MII and RMII modes of operation.
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  AN-1540 Power Measurement of Ethernet Physical Layer Products (Rev. B)
  PDF, 79 Kb, Revision: B, File published: Apr 26, 2013
  System designers require accurate component power consumption specifications, for the purposes of thermal management, component selection, and power distribution planning.
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  Reducing Radiated Emissions in Ethernet 10/100 LAN Applications (Rev. A)
  PDF, 70 Kb, Revision: A, File published: Apr 26, 2013
  This application report explains how Texas Instruments' PHYTER products help system designers toreduce radiated emissions in Ethernet 10/100 LAN applications.
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  AN-1469 PHYTERВ® Design & Layout Guide (Rev. D)
  PDF, 289 Kb, Revision: D, File published: Apr 26, 2013
  This application report describes PHYTERв„ў design and layout guidelines.
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  AN-1548 PHYTER 100 Base-TX Reference Clock Jitter Tolerance (Rev. B)
  PDF, 126 Kb, Revision: B, File published: Apr 26, 2013
  The use of a reference clock that is less stable than those directly driven from an oscillator may be required for some applications. In addition, some customer applications may require partnering with devices that operate outside of the IEEE 802.3 standard for transmitted jitter.

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Manufacturer's Classification

• Semiconductors > Interface > Ethernet > Ethernet PHY