Datasheet Texas Instruments DS25CP104ATSQX/NOPB
| Manufacturer | Texas Instruments |
| Series | DS25CP104A |
| Part Number | DS25CP104ATSQX/NOPB |
3.125 Gbps 4x4 LVDS Crosspoint Switch with Tx Pre-Emphasis & Rx Equalization 40-WQFN -40 to 85
Datasheets
DS25CP104A/CP114 3.125 Gbps 4x4 LVDS Xpoint Sw w/Xmit Pre-Emp & Receive Equal datasheet
PDF, 876 Kb, Revision: C, File published: Mar 4, 2013
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Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| Pin | 40 |
| Package Type | RTA |
| Industry STD Term | WQFN |
| JEDEC Code | S-PQFP-N |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | 2CP104AS |
| Width (mm) | 6 |
| Length (mm) | 6 |
| Thickness (mm) | .75 |
| Pitch (mm) | .5 |
| Max Height (mm) | .8 |
| Mechanical Data | Download |
Parametrics
| ESD HBM | 8 kV |
| Function | Crosspoint |
| Operating Temperature Range | -40 to 85 C |
| Package Group | WQFN |
| Package Size: mm2:W x L | 40WQFN: 36 mm2: 6 x 6(WQFN) PKG |
Eco Plan
| RoHS | Compliant |
Application Notes
- Triple Rate SDI IP FPGA Resource Utilization on SDXILEVK/AES-EXP-SDI-G Ref Dsgn (Rev. A)PDF, 50 Kb, Revision: A, File published: Apr 26, 2013
Texas Instruments triple rate (SD/HD/3G) SDI demonstration board showcases the LMH0340 serializer,LMH0341 deserializer, LMH0344 equalizer, LMH1981 sync separator, LMH1982 clock generator withgenlock and the DS25CP104 cross-point switch. There are many advantages to using the TexasInstruments chipset that include superior performance, reduced cost using inexpensive FPGAs such asthe Xilinx S - LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)PDF, 101 Kb, Revision: A, File published: Apr 29, 2013
This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions. - AN-1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter (Rev. A)PDF, 275 Kb, Revision: A, File published: Apr 26, 2013
Jitter is a phenomenon troubling many designers of high-speed interfaces. It reduces available timingmargin, limits transmission distance between a transmitter and a receiver, and increases system cost bydemanding better performing and more expensive interconnects. LVDS interfaces are not spared fromthese ill effects as they now operate at bit rates exceeding the 3 Gbps mark. Texas Instrumen - A 3 Gbps SDI Connectivity Solution Supporting Uncompressed 1080p60 VideoPDF, 2.9 Mb, File published: Mar 18, 2008
- DS25CP104 in 3G SDI Router ApplicationPDF, 770 Kb, File published: Aug 20, 2008
Model Line
Series: DS25CP104A (2)
- DS25CP104ATSQ/NOPB DS25CP104ATSQX/NOPB
Manufacturer's Classification
- Semiconductors > Interface > SDI > SDI Cable Equalizers, Drivers, Reclockers, and Cross-Points
