Datasheet Texas Instruments DS90CF363B

ManufacturerTexas Instruments
SeriesDS90CF363B
Datasheet Texas Instruments DS90CF363B

+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link - 65MHz

Datasheets

DS90CF363B 3.3V Prog LVDS Transm 18-Bit FPDLink -65 MHz datasheet
PDF, 917 Kb, Revision: D, File published: Apr 17, 2013
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Prices

Status

DS90CF363BMT/NOPBDS90CF363BMTX/NOPB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYes

Packaging

DS90CF363BMT/NOPBDS90CF363BMTX/NOPB
N12
Pin4848
Package TypeDGGDGG
Industry STD TermTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY381000
CarrierTUBELARGE T&R
Device MarkingDS90CF363BMTDS90CF363BMT
Width (mm)6.16.1
Length (mm)12.512.5
Thickness (mm)1.151.15
Pitch (mm).5.5
Max Height (mm)1.21.2
Mechanical DataDownloadDownload

Parametrics

Parameters / ModelsDS90CF363BMT/NOPB
DS90CF363BMT/NOPB
DS90CF363BMTX/NOPB
DS90CF363BMTX/NOPB
Color Depth, bpp1818
FunctionTransmitterTransmitter
Input CompatibilityLVCMOS,LVTTLLVCMOS,LVTTL
Operating Temperature Range, C-10 to 70-10 to 70
Output CompatibilityFPD-Link LVDSFPD-Link LVDS
Package GroupTSSOPTSSOP
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)
Pixel Clock Min, MHz1818
Pixel Clock(Max), MHz6868
RatingCatalogCatalog
Total Throughput, Mbps13001300

Eco Plan

DS90CF363BMT/NOPBDS90CF363BMTX/NOPB
RoHSCompliantCompliant

Application Notes

  • AN-1056 STN Application Using FPD-Link
    PDF, 85 Kb, File published: May 14, 2004
    Application Note 1056 STN Application Using FPD-Link
  • TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map
    PDF, 52 Kb, File published: May 15, 2004
    Application Note 1163 TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map
  • LVDS Display Interface (LDI) TFT Data Mapping for Interoperability w/FPD-Link
    PDF, 65 Kb, File published: May 14, 2004
    Application Note 1127 LVDS Display Interface (LDI) TFT Data Mapping for Interoperabil ity with FPD-Link
  • AN-1085 FPD-Link PCB and Interconnect Design-In Guidelines
    PDF, 344 Kb, File published: May 14, 2004
    Application Note 1085 FPD-Link PCB and Interconnect Design-In Guidelines
  • Receiver Skew Margin for Channel Link I and FPD Link I Devices
    PDF, 418 Kb, File published: Jan 13, 2016
  • AN-1032 An Introduction to FPD-Link (Rev. C)
    PDF, 185 Kb, Revision: C, File published: Aug 8, 2017
    The FPD-Linkchipsetarchitecturein conjunctionwith the LVDStechnologyprovidesthe highbandwidthinterfacenecessaryfor leadingedgedisplaytechnology.The conversionfromparallelTTL to serialLVDSallowsfor a narrowinterfacebetweengraphicscontrollerand panel.A narrowerinterfacemeanslowercablecost and simplifiesthe physicalconnectionthroug

Model Line

Manufacturer's Classification

  • Semiconductors> Interface> Display & Imaging SerDes> FlatLink/FPD-Link (LVDS for LCD)