Datasheet Texas Instruments DS90CF364

ManufacturerTexas Instruments
SeriesDS90CF364
Datasheet Texas Instruments DS90CF364

+3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link - 65 MHz

Datasheets

DS90C363/F364 3.3V Prog LVDS Trnsmit 18Bit FPD 65MHz/LVDS Rcvr 18Bit FPD 85MHz datasheet
PDF, 1.1 Mb, Revision: C, File published: Apr 12, 2013
Extract from the document

Prices

Status

DS90CF364MTD/NOPBDS90CF364MTDX/NOPB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYes

Packaging

DS90CF364MTD/NOPBDS90CF364MTDX/NOPB
N12
Pin4848
Package TypeDGGDGG
Industry STD TermTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY381000
CarrierTUBELARGE T&R
Device Marking>BDS90CF364MTD
Width (mm)6.16.1
Length (mm)12.512.5
Thickness (mm)1.151.15
Pitch (mm).5.5
Max Height (mm)1.21.2
Mechanical DataDownloadDownload

Parametrics

Parameters / ModelsDS90CF364MTD/NOPB
DS90CF364MTD/NOPB
DS90CF364MTDX/NOPB
DS90CF364MTDX/NOPB
Color Depth, bpp1818
FunctionReceiverReceiver
Input CompatibilityFPD-Link LVDSFPD-Link LVDS
Operating Temperature Range, C-40 to 85-40 to 85
Output CompatibilityLVCMOS,LVTTLLVCMOS,LVTTL
Package GroupTSSOPTSSOP
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)
Pixel Clock Min, MHz2020
Pixel Clock(Max), MHz6565
RatingCatalogCatalog
Total Throughput, Mbps13001300

Eco Plan

DS90CF364MTD/NOPBDS90CF364MTDX/NOPB
RoHSCompliantCompliant

Application Notes

  • AN-1056 STN Application Using FPD-Link
    PDF, 85 Kb, File published: May 14, 2004
    Application Note 1056 STN Application Using FPD-Link
  • TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map
    PDF, 52 Kb, File published: May 15, 2004
    Application Note 1163 TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map
  • LVDS Display Interface (LDI) TFT Data Mapping for Interoperability w/FPD-Link
    PDF, 65 Kb, File published: May 14, 2004
    Application Note 1127 LVDS Display Interface (LDI) TFT Data Mapping for Interoperabil ity with FPD-Link
  • AN-1085 FPD-Link PCB and Interconnect Design-In Guidelines
    PDF, 344 Kb, File published: May 14, 2004
    Application Note 1085 FPD-Link PCB and Interconnect Design-In Guidelines
  • Receiver Skew Margin for Channel Link I and FPD Link I Devices
    PDF, 418 Kb, File published: Jan 13, 2016
  • AN-1032 An Introduction to FPD-Link (Rev. C)
    PDF, 185 Kb, Revision: C, File published: Aug 8, 2017
    The FPD-Linkchipsetarchitecturein conjunctionwith the LVDStechnologyprovidesthe highbandwidthinterfacenecessaryfor leadingedgedisplaytechnology.The conversionfromparallelTTL to serialLVDSallowsfor a narrowinterfacebetweengraphicscontrollerand panel.A narrowerinterfacemeanslowercablecost and simplifiesthe physicalconnectionthroug

Model Line

Manufacturer's Classification

  • Semiconductors> Interface> Display & Imaging SerDes> FlatLink/FPD-Link (LVDS for LCD)