Datasheet Texas Instruments DS90CR286AMTD
| Manufacturer | Texas Instruments |
| Series | DS90CR286A |
| Part Number | DS90CR286AMTD |
+3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link - 66 MHz 56-TSSOP -40 to 85
Datasheets
DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Channel Link-66 MHz datasheet
PDF, 2.4 Mb, Revision: H, File published: Jan 18, 2016
Extract from the document
Prices
Status
| Lifecycle Status | NRND (Not recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 56 | 56 |
| Package Type | DGG | DGG |
| Industry STD Term | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G |
| Package QTY | 34 | 34 |
| Carrier | TUBE | TUBE |
| Device Marking | >B | DS90CR286AMTD |
| Width (mm) | 6.1 | 6.1 |
| Length (mm) | 14 | 14 |
| Thickness (mm) | 1.15 | 1.15 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1.2 | 1.2 |
| Mechanical Data | Download | Download |
Replacements
| Replacement | DS90CR286AMTD/NOPB |
| Replacement Code | S |
Parametrics
| Clock Max | 66 MHz |
| Clock Min | 20 MHz |
| Compression Ratio | 28 to 4 |
| Data Throughput | 1848 Mbps |
| ESD | 7 kV |
| Function | Deserializer |
| Input Compatibility | LVDS |
| Operating Temperature Range | -40 to 85 C |
| Output Compatibility | LVCMOS |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 56TSSOP: 113 mm2: 8.1 x 14(TSSOP) PKG |
| Parallel Bus Width | 28 bits |
| Protocols | Channel-Link I |
| Rating | Catalog |
| Supply Voltage(s) | 3.3 V |
Eco Plan
| RoHS | See ti.com |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: FLINK3V8BT-85
Evaluation Kit for FPD-Link Family of Serializer and Deserializer LVDS Devices
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- CHANNEL LINK Moving and Shaping Information In Point-To-Point ApplicationsPDF, 269 Kb, File published: Oct 5, 1998
- Multi-Drop Channel-Link OperationPDF, 212 Kb, File published: Oct 4, 2004
- AN-1108 Channel-Link PCB and Interconnect Design-In GuidelinesPDF, 245 Kb, File published: May 15, 2004
Application Note 1108 Channel-Link PCB and Interconnect Design-In Guidelines - Receiver Skew Margin for Channel Link I and FPD Link I DevicesPDF, 418 Kb, File published: Jan 13, 2016
Model Line
Series: DS90CR286A (3)
- DS90CR286AMTD DS90CR286AMTD/NOPB DS90CR286AMTDX/NOPB
Manufacturer's Classification
- Semiconductors > Interface > LVDS/M-LVDS/PECL > SerDes/Channel-Link
