Datasheet Texas Instruments DS90LV032A
Manufacturer | Texas Instruments |
Series | DS90LV032A |
3V LVDS Quad CMOS Differential Line Receiver
Datasheets
DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver datasheet
PDF, 1.0 Mb, Revision: D, File published: Aug 24, 2016
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Prices
Status
DS90LV032ATM | DS90LV032ATM/NOPB | DS90LV032ATMTC | DS90LV032ATMTC/NOPB | DS90LV032ATMTCX | DS90LV032ATMTCX/NOPB | DS90LV032ATMX | DS90LV032ATMX/NOPB | |
---|---|---|---|---|---|---|---|---|
Lifecycle Status | NRND (Not recommended for new designs) | Active (Recommended for new designs) | NRND (Not recommended for new designs) | Active (Recommended for new designs) | NRND (Not recommended for new designs) | Active (Recommended for new designs) | NRND (Not recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No | No | No | Yes | No | Yes | Yes |
Packaging
DS90LV032ATM | DS90LV032ATM/NOPB | DS90LV032ATMTC | DS90LV032ATMTC/NOPB | DS90LV032ATMTCX | DS90LV032ATMTCX/NOPB | DS90LV032ATMX | DS90LV032ATMX/NOPB | |
---|---|---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
Pin | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 |
Package Type | D | D | PW | PW | PW | PW | D | D |
Industry STD Term | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP | SOIC | SOIC |
JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
Package QTY | 48 | 48 | 92 | 92 | 2500 | 2500 | 2500 | 2500 |
Carrier | TUBE | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R | LARGE T&R | LARGE T&R |
Device Marking | DS90LV032A | TM | 032AT | DS90LV | 032AT | 032AT | TM | DS90LV032A |
Width (mm) | 3.91 | 3.91 | 4.4 | 4.4 | 4.4 | 4.4 | 3.91 | 3.91 |
Length (mm) | 9.9 | 9.9 | 5 | 5 | 5 | 5 | 9.9 | 9.9 |
Thickness (mm) | 1.58 | 1.58 | 1 | 1 | 1 | 1 | 1.58 | 1.58 |
Pitch (mm) | 1.27 | 1.27 | .65 | .65 | .65 | .65 | 1.27 | 1.27 |
Max Height (mm) | 1.75 | 1.75 | 1.2 | 1.2 | 1.2 | 1.2 | 1.75 | 1.75 |
Mechanical Data | Download | Download | Download | Download | Download | Download | Download | Download |
Parametrics
Parameters / Models | DS90LV032ATM | DS90LV032ATM/NOPB | DS90LV032ATMTC | DS90LV032ATMTC/NOPB | DS90LV032ATMTCX | DS90LV032ATMTCX/NOPB | DS90LV032ATMX | DS90LV032ATMX/NOPB |
---|---|---|---|---|---|---|---|---|
Device Type | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver |
ESD HBM, kV | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 |
Function | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver |
ICC(Max), mA | 15 | 15 | 15 | 15 | 15 | 15 | 15 | 15 |
Input Signal | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS |
No. of Rx | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
No. of Tx | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
Output Signal | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL |
Package Group | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP | SOIC | SOIC |
Package Size: mm2:W x L, PKG | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) |
Protocols | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS |
Signaling Rate, Mbps | 400 | 400 | 400 | 400 | 400 | 400 | 400 | 400 |
Eco Plan
DS90LV032ATM | DS90LV032ATM/NOPB | DS90LV032ATMTC | DS90LV032ATMTC/NOPB | DS90LV032ATMTCX | DS90LV032ATMTCX/NOPB | DS90LV032ATMX | DS90LV032ATMX/NOPB | |
---|---|---|---|---|---|---|---|---|
RoHS | See ti.com | Compliant | See ti.com | Compliant | See ti.com | Compliant | See ti.com | Compliant |
Application Notes
- AN-1110 LVDS Quad Dynamic I CC vs FrequencyPDF, 198 Kb, File published: May 15, 2004
Application Note 1110 LVDS Quad Dynamic I CC vs Frequency - An Overview of LVDS TechnologyPDF, 207 Kb, File published: Oct 5, 1998
Model Line
Series: DS90LV032A (8)
Manufacturer's Classification
- Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> LVDS PHY (<800Mbps)